simide.c revision 1.1.4.4 1 1.1.4.4 nathanw /* $NetBSD: simide.c,v 1.1.4.4 2002/10/18 02:33:46 nathanw Exp $ */
2 1.1.4.2 nathanw
3 1.1.4.2 nathanw /*
4 1.1.4.2 nathanw * Copyright (c) 1997-1998 Mark Brinicombe
5 1.1.4.2 nathanw * Copyright (c) 1997-1998 Causality Limited
6 1.1.4.2 nathanw *
7 1.1.4.2 nathanw * Redistribution and use in source and binary forms, with or without
8 1.1.4.2 nathanw * modification, are permitted provided that the following conditions
9 1.1.4.2 nathanw * are met:
10 1.1.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
11 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer.
12 1.1.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
13 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
14 1.1.4.2 nathanw * documentation and/or other materials provided with the distribution.
15 1.1.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
16 1.1.4.2 nathanw * must display the following acknowledgement:
17 1.1.4.2 nathanw * This product includes software developed by Mark Brinicombe
18 1.1.4.2 nathanw * for the NetBSD Project.
19 1.1.4.2 nathanw * 4. The name of the author may not be used to endorse or promote products
20 1.1.4.2 nathanw * derived from this software without specific prior written permission.
21 1.1.4.2 nathanw *
22 1.1.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.1.4.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1.4.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1.4.2 nathanw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.1.4.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.1.4.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.1.4.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.1.4.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.1.4.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.1.4.2 nathanw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1.4.2 nathanw *
33 1.1.4.2 nathanw * Card driver and probe and attach functions to use generic IDE driver
34 1.1.4.2 nathanw * for the Simtec IDE podule
35 1.1.4.2 nathanw */
36 1.1.4.2 nathanw
37 1.1.4.2 nathanw /*
38 1.1.4.2 nathanw * Thanks to Gareth Simpson, Simtec Electronics for providing
39 1.1.4.2 nathanw * the hardware information
40 1.1.4.2 nathanw */
41 1.1.4.2 nathanw
42 1.1.4.2 nathanw #include <sys/param.h>
43 1.1.4.2 nathanw #include <sys/systm.h>
44 1.1.4.2 nathanw #include <sys/conf.h>
45 1.1.4.2 nathanw #include <sys/device.h>
46 1.1.4.2 nathanw #include <sys/malloc.h>
47 1.1.4.2 nathanw
48 1.1.4.2 nathanw #include <machine/intr.h>
49 1.1.4.2 nathanw #include <machine/io.h>
50 1.1.4.2 nathanw #include <machine/bus.h>
51 1.1.4.2 nathanw #include <acorn32/podulebus/podulebus.h>
52 1.1.4.2 nathanw #include <acorn32/podulebus/simidereg.h>
53 1.1.4.2 nathanw
54 1.1.4.2 nathanw #include <dev/ata/atavar.h>
55 1.1.4.2 nathanw #include <dev/ic/wdcvar.h>
56 1.1.4.2 nathanw #include <dev/podulebus/podules.h>
57 1.1.4.2 nathanw
58 1.1.4.2 nathanw
59 1.1.4.2 nathanw /*
60 1.1.4.2 nathanw * Simtec IDE podule device.
61 1.1.4.2 nathanw *
62 1.1.4.2 nathanw * This probes and attaches the top level Simtec IDE device to the podulebus.
63 1.1.4.2 nathanw * It then configures any children of the Simtec IDE device.
64 1.1.4.2 nathanw * The attach args specify whether it is configuring the primary or
65 1.1.4.2 nathanw * secondary channel.
66 1.1.4.2 nathanw * The children are expected to be wdc devices using simide attachments.
67 1.1.4.2 nathanw */
68 1.1.4.2 nathanw
69 1.1.4.2 nathanw /*
70 1.1.4.2 nathanw * Simtec IDE card softc structure.
71 1.1.4.2 nathanw *
72 1.1.4.2 nathanw * Contains the device node, podule information and global information
73 1.1.4.2 nathanw * required by the driver such as the card version and the interrupt mask.
74 1.1.4.2 nathanw */
75 1.1.4.2 nathanw
76 1.1.4.2 nathanw struct simide_softc {
77 1.1.4.2 nathanw struct wdc_softc sc_wdcdev; /* common wdc definitions */
78 1.1.4.2 nathanw struct channel_softc *wdc_chanarray[2]; /* channels definition */
79 1.1.4.2 nathanw podule_t *sc_podule; /* Our podule info */
80 1.1.4.2 nathanw int sc_podule_number; /* Our podule number */
81 1.1.4.2 nathanw int sc_ctl_reg; /* Global ctl reg */
82 1.1.4.2 nathanw int sc_version; /* Card version */
83 1.1.4.2 nathanw bus_space_tag_t sc_ctliot; /* Bus tag */
84 1.1.4.2 nathanw bus_space_handle_t sc_ctlioh; /* control handle */
85 1.1.4.2 nathanw struct bus_space sc_tag; /* custom tag */
86 1.1.4.2 nathanw struct simide_channel {
87 1.1.4.2 nathanw struct channel_softc wdc_channel; /* generic part */
88 1.1.4.2 nathanw irqhandler_t sc_ih; /* interrupt handler */
89 1.1.4.2 nathanw int sc_irqmask; /* IRQ mask for this channel */
90 1.1.4.2 nathanw } simide_channels[2];
91 1.1.4.2 nathanw };
92 1.1.4.2 nathanw
93 1.1.4.2 nathanw int simide_probe __P((struct device *, struct cfdata *, void *));
94 1.1.4.2 nathanw void simide_attach __P((struct device *, struct device *, void *));
95 1.1.4.2 nathanw void simide_shutdown __P((void *arg));
96 1.1.4.2 nathanw int simide_intr __P((void *arg));
97 1.1.4.2 nathanw
98 1.1.4.4 nathanw CFATTACH_DECL(simide, sizeof(struct simide_softc),
99 1.1.4.4 nathanw simide_probe, simide_attach, NULL, NULL);
100 1.1.4.2 nathanw
101 1.1.4.2 nathanw
102 1.1.4.2 nathanw /*
103 1.1.4.2 nathanw * Define prototypes for custom bus space functions.
104 1.1.4.2 nathanw */
105 1.1.4.2 nathanw
106 1.1.4.2 nathanw bs_rm_2_proto(simide);
107 1.1.4.2 nathanw bs_wm_2_proto(simide);
108 1.1.4.2 nathanw
109 1.1.4.2 nathanw /*
110 1.1.4.2 nathanw * Create an array of address structures. These define the addresses and
111 1.1.4.2 nathanw * masks needed for the different channels.
112 1.1.4.2 nathanw *
113 1.1.4.2 nathanw * index = channel
114 1.1.4.2 nathanw */
115 1.1.4.2 nathanw
116 1.1.4.2 nathanw struct {
117 1.1.4.2 nathanw u_int drive_registers;
118 1.1.4.2 nathanw u_int aux_register;
119 1.1.4.2 nathanw u_int irq_mask;
120 1.1.4.2 nathanw } simide_info[] = {
121 1.1.4.2 nathanw { PRIMARY_DRIVE_REGISTERS_POFFSET, PRIMARY_AUX_REGISTER_POFFSET,
122 1.1.4.2 nathanw CONTROL_PRIMARY_IRQ },
123 1.1.4.2 nathanw { SECONDARY_DRIVE_REGISTERS_POFFSET, SECONDARY_AUX_REGISTER_POFFSET,
124 1.1.4.2 nathanw CONTROL_SECONDARY_IRQ }
125 1.1.4.2 nathanw };
126 1.1.4.2 nathanw
127 1.1.4.2 nathanw /*
128 1.1.4.2 nathanw * Card probe function
129 1.1.4.2 nathanw *
130 1.1.4.2 nathanw * Just match the manufacturer and podule ID's
131 1.1.4.2 nathanw */
132 1.1.4.2 nathanw
133 1.1.4.2 nathanw int
134 1.1.4.2 nathanw simide_probe(parent, cf, aux)
135 1.1.4.2 nathanw struct device *parent;
136 1.1.4.2 nathanw struct cfdata *cf;
137 1.1.4.2 nathanw void *aux;
138 1.1.4.2 nathanw {
139 1.1.4.2 nathanw struct podule_attach_args *pa = (void *)aux;
140 1.1.4.2 nathanw
141 1.1.4.3 nathanw return (pa->pa_product == PODULE_SIMTEC_IDE);
142 1.1.4.2 nathanw }
143 1.1.4.2 nathanw
144 1.1.4.2 nathanw /*
145 1.1.4.2 nathanw * Card attach function
146 1.1.4.2 nathanw *
147 1.1.4.2 nathanw * Identify the card version and configure any children.
148 1.1.4.2 nathanw * Install a shutdown handler to kill interrupts on shutdown
149 1.1.4.2 nathanw */
150 1.1.4.2 nathanw
151 1.1.4.2 nathanw void
152 1.1.4.2 nathanw simide_attach(parent, self, aux)
153 1.1.4.2 nathanw struct device *parent, *self;
154 1.1.4.2 nathanw void *aux;
155 1.1.4.2 nathanw {
156 1.1.4.2 nathanw struct simide_softc *sc = (void *)self;
157 1.1.4.2 nathanw struct podule_attach_args *pa = (void *)aux;
158 1.1.4.2 nathanw int status;
159 1.1.4.2 nathanw u_int iobase;
160 1.1.4.2 nathanw int channel;
161 1.1.4.2 nathanw struct simide_channel *scp;
162 1.1.4.2 nathanw struct channel_softc *cp;
163 1.1.4.2 nathanw irqhandler_t *ihp;
164 1.1.4.2 nathanw
165 1.1.4.2 nathanw /* Note the podule number and validate */
166 1.1.4.2 nathanw if (pa->pa_podule_number == -1)
167 1.1.4.2 nathanw panic("Podule has disappeared !");
168 1.1.4.2 nathanw
169 1.1.4.2 nathanw sc->sc_podule_number = pa->pa_podule_number;
170 1.1.4.2 nathanw sc->sc_podule = pa->pa_podule;
171 1.1.4.2 nathanw podules[sc->sc_podule_number].attached = 1;
172 1.1.4.2 nathanw
173 1.1.4.2 nathanw /*
174 1.1.4.2 nathanw * Ok we need our own bus tag as the register spacing
175 1.1.4.2 nathanw * is not the default.
176 1.1.4.2 nathanw *
177 1.1.4.2 nathanw * For the podulebus the bus tag cookie is the shift
178 1.1.4.2 nathanw * to apply to registers
179 1.1.4.2 nathanw * So duplicate the bus space tag and change the
180 1.1.4.2 nathanw * cookie.
181 1.1.4.2 nathanw *
182 1.1.4.2 nathanw * Also while we are at it replace the default
183 1.1.4.2 nathanw * read/write mulitple short functions with
184 1.1.4.2 nathanw * optimised versions
185 1.1.4.2 nathanw */
186 1.1.4.2 nathanw
187 1.1.4.2 nathanw sc->sc_tag = *pa->pa_iot;
188 1.1.4.2 nathanw sc->sc_tag.bs_cookie = (void *) DRIVE_REGISTER_SPACING_SHIFT;
189 1.1.4.2 nathanw sc->sc_tag.bs_rm_2 = simide_bs_rm_2;
190 1.1.4.2 nathanw sc->sc_tag.bs_wm_2 = simide_bs_wm_2;
191 1.1.4.2 nathanw sc->sc_ctliot = pa->pa_iot;
192 1.1.4.2 nathanw
193 1.1.4.2 nathanw /* Obtain bus space handles for all the control registers */
194 1.1.4.2 nathanw if (bus_space_map(sc->sc_ctliot, pa->pa_podule->mod_base +
195 1.1.4.2 nathanw CONTROL_REGISTERS_POFFSET, CONTROL_REGISTER_SPACE, 0,
196 1.1.4.2 nathanw &sc->sc_ctlioh))
197 1.1.4.4 nathanw panic("%s: Cannot map control registers", self->dv_xname);
198 1.1.4.2 nathanw
199 1.1.4.2 nathanw /* Install a clean up handler to make sure IRQ's are disabled */
200 1.1.4.2 nathanw if (shutdownhook_establish(simide_shutdown, (void *)sc) == NULL)
201 1.1.4.2 nathanw panic("%s: Cannot install shutdown handler", self->dv_xname);
202 1.1.4.2 nathanw
203 1.1.4.2 nathanw /* Set the interrupt info for this podule */
204 1.1.4.2 nathanw sc->sc_podule->irq_addr = pa->pa_podule->mod_base
205 1.1.4.2 nathanw + CONTROL_REGISTERS_POFFSET + (CONTROL_REGISTER_OFFSET << 2);
206 1.1.4.2 nathanw sc->sc_podule->irq_mask = STATUS_IRQ;
207 1.1.4.2 nathanw
208 1.1.4.2 nathanw sc->sc_ctl_reg = 0;
209 1.1.4.2 nathanw
210 1.1.4.2 nathanw status = bus_space_read_1(sc->sc_ctliot, sc->sc_ctlioh,
211 1.1.4.2 nathanw STATUS_REGISTER_OFFSET);
212 1.1.4.2 nathanw
213 1.1.4.2 nathanw printf(":");
214 1.1.4.2 nathanw /* If any of the bits in STATUS_FAULT are zero then we have a fault. */
215 1.1.4.2 nathanw if ((status & STATUS_FAULT) != STATUS_FAULT)
216 1.1.4.2 nathanw printf(" card/cable fault (%02x) -", status);
217 1.1.4.2 nathanw
218 1.1.4.2 nathanw if (!(status & STATUS_RESET))
219 1.1.4.2 nathanw printf(" (reset)");
220 1.1.4.2 nathanw if (!(status & STATUS_ADDR_TEST))
221 1.1.4.2 nathanw printf(" (addr)");
222 1.1.4.2 nathanw if (!(status & STATUS_CS_TEST))
223 1.1.4.2 nathanw printf(" (cs)");
224 1.1.4.2 nathanw if (!(status & STATUS_RW_TEST))
225 1.1.4.2 nathanw printf(" (rw)");
226 1.1.4.2 nathanw
227 1.1.4.2 nathanw printf("\n");
228 1.1.4.2 nathanw
229 1.1.4.2 nathanw /* Perhaps we should just abort at this point. */
230 1.1.4.2 nathanw /* if ((status & STATUS_FAULT) != STATUS_FAULT)
231 1.1.4.2 nathanw return;*/
232 1.1.4.2 nathanw
233 1.1.4.2 nathanw /*
234 1.1.4.2 nathanw * Enable IDE, Obey IORDY and disabled slow mode
235 1.1.4.2 nathanw */
236 1.1.4.2 nathanw sc->sc_ctl_reg |= CONTROL_IDE_ENABLE | CONTROL_IORDY
237 1.1.4.2 nathanw | CONTROL_SLOW_MODE_OFF;
238 1.1.4.2 nathanw bus_space_write_1(sc->sc_ctliot, sc->sc_ctlioh,
239 1.1.4.2 nathanw CONTROL_REGISTER_OFFSET, sc->sc_ctl_reg);
240 1.1.4.2 nathanw
241 1.1.4.2 nathanw /* Fill in wdc and channel infos */
242 1.1.4.2 nathanw sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
243 1.1.4.2 nathanw sc->sc_wdcdev.PIO_cap = 0;
244 1.1.4.2 nathanw sc->sc_wdcdev.channels = sc->wdc_chanarray;
245 1.1.4.2 nathanw sc->sc_wdcdev.nchannels = 2;
246 1.1.4.2 nathanw for (channel = 0 ; channel < 2; channel++) {
247 1.1.4.2 nathanw scp = &sc->simide_channels[channel];
248 1.1.4.2 nathanw sc->wdc_chanarray[channel] = &scp->wdc_channel;
249 1.1.4.2 nathanw cp = &scp->wdc_channel;
250 1.1.4.2 nathanw
251 1.1.4.2 nathanw cp->channel = channel;
252 1.1.4.2 nathanw cp->wdc = &sc->sc_wdcdev;
253 1.1.4.2 nathanw cp->ch_queue = malloc(sizeof(struct channel_queue),
254 1.1.4.2 nathanw M_DEVBUF, M_NOWAIT);
255 1.1.4.2 nathanw if (cp->ch_queue == NULL) {
256 1.1.4.2 nathanw printf("%s %s channel: can't allocate memory for "
257 1.1.4.2 nathanw "command queue", self->dv_xname,
258 1.1.4.2 nathanw (channel == 0) ? "primary" : "secondary");
259 1.1.4.2 nathanw continue;
260 1.1.4.2 nathanw }
261 1.1.4.2 nathanw cp->cmd_iot = cp->ctl_iot = &sc->sc_tag;
262 1.1.4.2 nathanw iobase = pa->pa_podule->mod_base;
263 1.1.4.2 nathanw if (bus_space_map(cp->cmd_iot, iobase +
264 1.1.4.2 nathanw simide_info[channel].drive_registers,
265 1.1.4.2 nathanw DRIVE_REGISTERS_SPACE, 0, &cp->cmd_ioh))
266 1.1.4.2 nathanw continue;
267 1.1.4.2 nathanw if (bus_space_map(cp->ctl_iot, iobase +
268 1.1.4.2 nathanw simide_info[channel].aux_register, 4, 0, &cp->ctl_ioh)) {
269 1.1.4.2 nathanw bus_space_unmap(cp->cmd_iot, cp->cmd_ioh,
270 1.1.4.2 nathanw DRIVE_REGISTERS_SPACE);
271 1.1.4.2 nathanw continue;
272 1.1.4.2 nathanw }
273 1.1.4.2 nathanw /* Disable interrupts and clear any pending interrupts */
274 1.1.4.2 nathanw scp->sc_irqmask = simide_info[channel].irq_mask;
275 1.1.4.2 nathanw sc->sc_ctl_reg &= ~scp->sc_irqmask;
276 1.1.4.2 nathanw bus_space_write_1(sc->sc_ctliot, sc->sc_ctlioh,
277 1.1.4.2 nathanw CONTROL_REGISTER_OFFSET, sc->sc_ctl_reg);
278 1.1.4.2 nathanw wdcattach(cp);
279 1.1.4.2 nathanw ihp = &scp->sc_ih;
280 1.1.4.2 nathanw ihp->ih_func = simide_intr;
281 1.1.4.2 nathanw ihp->ih_arg = scp;
282 1.1.4.2 nathanw ihp->ih_level = IPL_BIO;
283 1.1.4.2 nathanw ihp->ih_name = "simide";
284 1.1.4.2 nathanw ihp->ih_maskaddr = pa->pa_podule->irq_addr;
285 1.1.4.2 nathanw ihp->ih_maskbits = scp->sc_irqmask;
286 1.1.4.2 nathanw if (irq_claim(sc->sc_podule->interrupt, ihp))
287 1.1.4.4 nathanw panic("%s: Cannot claim interrupt %d",
288 1.1.4.2 nathanw self->dv_xname, sc->sc_podule->interrupt);
289 1.1.4.2 nathanw /* clear any pending interrupts and enable interrupts */
290 1.1.4.2 nathanw sc->sc_ctl_reg |= scp->sc_irqmask;
291 1.1.4.2 nathanw bus_space_write_1(sc->sc_ctliot, sc->sc_ctlioh,
292 1.1.4.2 nathanw CONTROL_REGISTER_OFFSET, sc->sc_ctl_reg);
293 1.1.4.2 nathanw }
294 1.1.4.2 nathanw
295 1.1.4.2 nathanw }
296 1.1.4.2 nathanw
297 1.1.4.2 nathanw /*
298 1.1.4.2 nathanw * Card shutdown function
299 1.1.4.2 nathanw *
300 1.1.4.2 nathanw * Called via do_shutdown_hooks() during kernel shutdown.
301 1.1.4.2 nathanw * Clear the cards's interrupt mask to stop any podule interrupts.
302 1.1.4.2 nathanw */
303 1.1.4.2 nathanw
304 1.1.4.2 nathanw void
305 1.1.4.2 nathanw simide_shutdown(arg)
306 1.1.4.2 nathanw void *arg;
307 1.1.4.2 nathanw {
308 1.1.4.2 nathanw struct simide_softc *sc = arg;
309 1.1.4.2 nathanw
310 1.1.4.2 nathanw sc->sc_ctl_reg &= (CONTROL_PRIMARY_IRQ | CONTROL_SECONDARY_IRQ);
311 1.1.4.2 nathanw
312 1.1.4.2 nathanw /* Disable card interrupts */
313 1.1.4.2 nathanw bus_space_write_1(sc->sc_ctliot, sc->sc_ctlioh,
314 1.1.4.2 nathanw CONTROL_REGISTER_OFFSET, sc->sc_ctl_reg);
315 1.1.4.2 nathanw }
316 1.1.4.2 nathanw
317 1.1.4.2 nathanw /*
318 1.1.4.2 nathanw * Podule interrupt handler
319 1.1.4.2 nathanw *
320 1.1.4.2 nathanw * If the interrupt was from our card pass it on to the wdc interrupt handler
321 1.1.4.2 nathanw */
322 1.1.4.2 nathanw int
323 1.1.4.2 nathanw simide_intr(arg)
324 1.1.4.2 nathanw void *arg;
325 1.1.4.2 nathanw {
326 1.1.4.2 nathanw struct simide_channel *scp = arg;
327 1.1.4.2 nathanw irqhandler_t *ihp = &scp->sc_ih;
328 1.1.4.2 nathanw volatile u_char *intraddr = (volatile u_char *)ihp->ih_maskaddr;
329 1.1.4.2 nathanw
330 1.1.4.2 nathanw /* XXX - not bus space yet - should really be handled by podulebus */
331 1.1.4.2 nathanw if ((*intraddr) & ihp->ih_maskbits)
332 1.1.4.2 nathanw wdcintr(&scp->wdc_channel);
333 1.1.4.2 nathanw
334 1.1.4.2 nathanw return(0);
335 1.1.4.2 nathanw }
336