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mainbus.c revision 1.31
      1 /*	$NetBSD: mainbus.c,v 1.31 2023/12/20 06:36:01 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.31 2023/12/20 06:36:01 thorpej Exp $");
     34 
     35 #include "opt_algor_p4032.h"
     36 #include "opt_algor_p5064.h"
     37 #include "opt_algor_p6032.h"
     38 
     39 #include "opt_pci.h"
     40 
     41 #include <sys/param.h>
     42 #include <sys/bus.h>
     43 #include <sys/conf.h>
     44 #include <sys/device.h>
     45 #include <sys/reboot.h>
     46 #include <sys/systm.h>
     47 
     48 #include <algor/autoconf.h>
     49 
     50 #include <mips/cache.h>
     51 
     52 #include <dev/pci/pcivar.h>
     53 #include <dev/pci/pciconf.h>
     54 
     55 #if defined(PCI_NETBSD_CONFIGURE) && defined(PCI_NETBSD_ENABLE_IDE)
     56 #if defined(ALGOR_P5064) || defined(ALGOR_P6032)
     57 #include <dev/pci/pciide_piix_reg.h>
     58 #endif /* ALGOR_P5064 || ALGOR_P6032 */
     59 #endif /* PCI_NETBSD_CONFIGURE && PCI_NETBSD_ENABLE_IDE */
     60 
     61 #include "locators.h"
     62 #include "pci.h"
     63 
     64 int	mainbus_match(device_t, cfdata_t, void *);
     65 void	mainbus_attach(device_t, device_t, void *);
     66 
     67 CFATTACH_DECL_NEW(mainbus, 0,
     68     mainbus_match, mainbus_attach, NULL, NULL);
     69 
     70 int	mainbus_print(void *, const char *);
     71 int	mainbus_submatch(device_t, cfdata_t,
     72 			 const int *, void *);
     73 
     74 /* There can be only one. */
     75 int	mainbus_found;
     76 
     77 struct mainbusdev {
     78 	const char *md_name;
     79 	bus_addr_t md_addr;
     80 	int md_irq;
     81 };
     82 
     83 #if defined(ALGOR_P4032)
     84 #include <algor/algor/algor_p4032reg.h>
     85 #include <algor/algor/algor_p4032var.h>
     86 
     87 struct mainbusdev mainbusdevs[] = {
     88 	{ "cpu",		-1,			-1 },
     89 	{ "mcclock",		P4032_RTC,		P4032_IRQ_RTC },
     90 	{ "com",		P4032_COM1,		P4032_IRQ_COM1 },
     91 	{ "com",		P4032_COM2,		P4032_IRQ_COM2 },
     92 	{ "lpt",		P4032_LPT,		P4032_IRQ_LPT },
     93 	{ "pckbc",		P4032_PCKBC,		P4032_IRQ_PCKBC },
     94 	{ "fdc",		P4032_FDC,		P4032_IRQ_FLOPPY },
     95 	{ "vtpbc",		P4032_V962PBC,		-1 },
     96 
     97 	{ NULL,			0,			0 },
     98 };
     99 
    100 /* Reserve the bottom 64K of the I/O space for ISA devices. */
    101 #define	PCI_IO_START	0x00010000
    102 #define	PCI_IO_END	0x000effff
    103 #define	PCI_MEM_START	0x01000000
    104 #define	PCI_MEM_END	0x07ffffff
    105 #define	PCI_CHIPSET	&p4032_configuration.ac_pc
    106 #endif /* ALGOR_P4032 */
    107 
    108 #if defined(ALGOR_P5064)
    109 #include <algor/algor/algor_p5064reg.h>
    110 #include <algor/algor/algor_p5064var.h>
    111 
    112 struct mainbusdev mainbusdevs[] = {
    113 	{ "cpu",		-1,			-1 },
    114 	{ "vtpbc",		P5064_V360EPC,		-1 },
    115 
    116 	{ NULL,			0,			0 },
    117 };
    118 
    119 /*
    120  * Reserve the bottom 512K of the I/O space for ISA devices.
    121  * According to the PMON sources, this is a work-around for
    122  * a bug in the ISA bridge.
    123  */
    124 #define	PCI_IO_START	0x00080000
    125 #define	PCI_IO_END	0x00ffffff
    126 #define	PCI_MEM_START	0x01000000
    127 #define	PCI_MEM_END	0x07ffffff
    128 #define	PCI_IDE_DEV	2
    129 #define	PCI_IDE_FUNC	1
    130 #define	PCI_CHIPSET	&p5064_configuration.ac_pc
    131 #endif /* ALGOR_P5064 */
    132 
    133 #if defined(ALGOR_P6032)
    134 #include <algor/algor/algor_p6032reg.h>
    135 #include <algor/algor/algor_p6032var.h>
    136 
    137 struct mainbusdev mainbusdevs[] = {
    138 	{ "cpu",		-1,			-1 },
    139 	{ "bonito",		BONITO_REG_BASE,	-1 },
    140 
    141 	{ NULL,			0,			0 },
    142 };
    143 
    144 /* Reserve the bottom 64K of the I/O space for ISA devices. */
    145 #define	PCI_IO_START	0x00010000
    146 #define	PCI_IO_END	0x000effff
    147 #define	PCI_MEM_START	0x01000000
    148 #define	PCI_MEM_END	0x0affffff
    149 #define	PCI_IDE_DEV	17
    150 #define	PCI_IDE_FUNC	1
    151 #define	PCI_CHIPSET	&p6032_configuration.ac_pc
    152 #endif /* ALGOR_P6032 */
    153 
    154 #define	PCI_IO_SIZE	((PCI_IO_END - PCI_IO_START) + 1)
    155 #define	PCI_MEM_SIZE	((PCI_MEM_END - PCI_MEM_START) + 1)
    156 
    157 int
    158 mainbus_match(device_t parent, cfdata_t cf, void *aux)
    159 {
    160 
    161 	if (mainbus_found)
    162 		return (0);
    163 
    164 	return (1);
    165 }
    166 
    167 void
    168 mainbus_attach(device_t parent, device_t self, void *aux)
    169 {
    170 	struct mainbus_attach_args ma;
    171 	struct mainbusdev *md;
    172 	bus_space_tag_t st;
    173 
    174 	mainbus_found = 1;
    175 
    176 	printf("\n");
    177 
    178 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
    179 	struct pciconf_resources *pcires = pciconf_resource_init();
    180 
    181 	pciconf_resource_add(pcires, PCICONF_RESOURCE_IO,
    182 	    PCI_IO_START, PCI_IO_SIZE);
    183 	pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM,
    184 	    PCI_MEM_START, PCI_MEM_SIZE);
    185 
    186 	pci_configure_bus(PCI_CHIPSET, pcires, 0,
    187 	    mips_cache_info.mci_dcache_align);
    188 	pciconf_resource_fini(pcires);
    189 
    190 #if defined(PCI_NETBSD_ENABLE_IDE)
    191 	/*
    192 	 * Perhaps PMON has not enabled the IDE controller.  Easy to
    193 	 * fix -- just set the ENABLE bits for each channel in the
    194 	 * IDETIM register.  Just clear all the bits for the channel
    195 	 * except for the ENABLE bits -- the `pciide' driver will
    196 	 * properly configure it later.
    197 	 */
    198 	pcitag_t idetag = pci_make_tag(PCI_CHIPSET, 0, PCI_IDE_DEV,
    199 	    PCI_IDE_FUNC);
    200 	pcireg_t idetim = 0;
    201 	if (PCI_NETBSD_ENABLE_IDE & 0x01)
    202 		idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, 0);
    203 	if (PCI_NETBSD_ENABLE_IDE & 0x02)
    204 		idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, 1);
    205 	pci_conf_write(PCI_CHIPSET, idetag, PIIX_IDETIM, idetim);
    206 #endif
    207 #endif /* NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) */
    208 
    209 #if defined(ALGOR_P4032)
    210 	st = &p4032_configuration.ac_lociot;
    211 #elif defined(ALGOR_P5064)
    212 	st = NULL;
    213 #elif defined(ALGOR_P6032)
    214 	st = NULL;
    215 #endif
    216 
    217 	for (md = mainbusdevs; md->md_name != NULL; md++) {
    218 		ma.ma_name = md->md_name;
    219 		ma.ma_st = st;
    220 		ma.ma_addr = md->md_addr;
    221 		ma.ma_irq = md->md_irq;
    222 		config_found(self, &ma, mainbus_print,
    223 		    CFARGS(.submatch = mainbus_submatch));
    224 	}
    225 }
    226 
    227 int
    228 mainbus_print(void *aux, const char *pnp)
    229 {
    230 	struct mainbus_attach_args *ma = aux;
    231 
    232 	if (pnp)
    233 		aprint_normal("%s at %s", ma->ma_name, pnp);
    234 	if (ma->ma_addr != (bus_addr_t) -1)
    235 		aprint_normal(" addr %#" PRIxBUSADDR, ma->ma_addr);
    236 
    237 	return (UNCONF);
    238 }
    239 
    240 int
    241 mainbus_submatch(device_t parent, cfdata_t cf,
    242 		 const int *ldesc, void *aux)
    243 {
    244 	struct mainbus_attach_args *ma = aux;
    245 
    246 	if (cf->cf_loc[MAINBUSCF_ADDR] != MAINBUSCF_ADDR_DEFAULT &&
    247 	    cf->cf_loc[MAINBUSCF_ADDR] != ma->ma_addr)
    248 		return (0);
    249 
    250 	return (config_match(parent, cf, aux));
    251 }
    252