intr.h revision 1.13 
1/*	$NetBSD: intr.h,v 1.13 2008/04/28 20:23:10 martin Exp $	*/
2
3/*-
4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef _ALGOR_INTR_H_
33#define _ALGOR_INTR_H_
34
35#include <sys/evcnt.h>
36#include <sys/queue.h>
37
38#define	IPL_NONE	0	/* disable only this interrupt */
39#define	IPL_SOFTCLOCK	1	/* generic software interrupts (SI 0) */
40#define	IPL_SOFTBIO	1	/* clock software interrupts (SI 0) */
41#define	IPL_SOFTNET	2	/* network software interrupts (SI 1) */
42#define	IPL_SOFTSERIAL	2	/* serial software interrupts (SI 1) */
43#define	IPL_VM		3
44#define	IPL_SCHED	4
45#define	IPL_HIGH	4	/* disable all interrupts */
46
47#define	_IPL_N		5
48
49#define	_IPL_SI0_FIRST	IPL_SOFTCLOCK
50#define	_IPL_SI0_LAST	IPL_SOFTBIO
51
52#define	_IPL_SI1_FIRST	IPL_SOFTNET
53#define	_IPL_SI1_LAST	IPL_SOFTSERIAL
54
55#define	IST_UNUSABLE	-1	/* interrupt cannot be used */
56#define	IST_NONE	0	/* none (dummy) */
57#define	IST_PULSE	1	/* pulsed */
58#define	IST_EDGE	2	/* edge-triggered */
59#define	IST_LEVEL	3	/* level-triggered */
60
61#ifdef	_KERNEL
62
63#include <mips/locore.h>
64
65extern const u_int32_t ipl_sr_bits[_IPL_N];
66
67#define	spl0()		(void) _spllower(0)
68#define	splx(s)		(void) _splset(s)
69
70typedef int ipl_t;
71typedef struct {
72	ipl_t _sr;
73} ipl_cookie_t;
74
75static inline ipl_cookie_t
76makeiplcookie(ipl_t ipl)
77{
78
79	return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]};
80}
81
82static inline int
83splraiseipl(ipl_cookie_t icookie)
84{
85
86	return _splraise(icookie._sr);
87}
88
89#include <sys/spl.h>
90
91struct algor_intrhand {
92	LIST_ENTRY(algor_intrhand) ih_q;
93	int (*ih_func)(void *);
94	void *ih_arg;
95	int ih_irq;		/* mostly for ISA */
96	const void *ih_irqmap;
97};
98
99#include <mips/softintr.h>
100
101extern struct evcnt mips_int5_evcnt;
102
103void	intr_init(void);
104void	*(*algor_intr_establish)(int, int (*)(void *), void *);
105void	(*algor_intr_disestablish)(void *);
106
107#endif /* _KERNEL */
108#endif /* ! _ALGOR_INTR_H_ */
109