vtpbc.c revision 1.4
1 /* $NetBSD: vtpbc.c,v 1.4 2003/07/14 22:57:48 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Support for the V3 Semiconductor i960 PCI bus controller. This appears 41 * on some MIPS boards (notably Algorithmics P-4032 and P-5064). 42 * 43 * Some help was provided by the Algorithmics PMON sources. 44 */ 45 46 #include <sys/cdefs.h> 47 __KERNEL_RCSID(0, "$NetBSD: vtpbc.c,v 1.4 2003/07/14 22:57:48 lukem Exp $"); 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 53 #include <machine/bus.h> 54 #include <machine/intr.h> 55 #include <machine/locore.h> 56 57 #include <dev/pci/pcireg.h> 58 #include <dev/pci/pcivar.h> 59 60 #include <algor/pci/vtpbcreg.h> 61 #include <algor/pci/vtpbcvar.h> 62 63 struct vtpbc_config vtpbc_configuration; 64 65 #define PCI_CONF_LOCK(s) (s) = splhigh() 66 #define PCI_CONF_UNLOCK(s) splx((s)) 67 68 const char *vtpbc_revs[] = { 69 "A", 70 "B0", 71 "B1", 72 "B2", 73 "C0", 74 }; 75 const int vtpbc_nrevs = sizeof(vtpbc_revs) / sizeof(vtpbc_revs[0]); 76 77 void vtpbc_attach_hook(struct device *, struct device *, 78 struct pcibus_attach_args *); 79 int vtpbc_bus_maxdevs(void *, int); 80 pcitag_t vtpbc_make_tag(void *, int, int, int); 81 void vtpbc_decompose_tag(void *, pcitag_t, int *, int *, int *); 82 pcireg_t vtpbc_conf_read(void *, pcitag_t, int); 83 void vtpbc_conf_write(void *, pcitag_t, int, pcireg_t); 84 85 /* 86 * vtpbc_init: 87 * 88 * Initialize the V3 PCI controller's software state. We 89 * simply use the existing windows that the firmware has 90 * set up for us. 91 */ 92 void 93 vtpbc_init(pci_chipset_tag_t pc, struct vtpbc_config *vt) 94 { 95 96 pc->pc_conf_v = vt; 97 pc->pc_attach_hook = vtpbc_attach_hook; 98 pc->pc_bus_maxdevs = vtpbc_bus_maxdevs; 99 pc->pc_make_tag = vtpbc_make_tag; 100 pc->pc_decompose_tag = vtpbc_decompose_tag; 101 pc->pc_conf_read = vtpbc_conf_read; 102 pc->pc_conf_write = vtpbc_conf_write; 103 104 vt->vt_rev = V96X_PCI_CC_REV(vt) & V96X_PCI_CC_REV_VREV; 105 106 /* 107 * Determine the PCI I/O space base that our PCI 108 * I/O window maps to. NOTE: We disable this on 109 * PBC rev < B2. 110 * 111 * Also note that PMON has disabled the I/O space 112 * if the old-style PCI address map is in-use. 113 */ 114 if (vt->vt_rev < V96X_VREV_B2) 115 vt->vt_pci_iobase = (bus_addr_t) -1; 116 else { 117 if ((V96X_LB_BASE2(vt) & V96X_LB_BASEx_ENABLE) == 0) 118 vt->vt_pci_iobase = (bus_addr_t) -1; 119 else 120 vt->vt_pci_iobase = 121 (V96X_LB_MAP2(vt) & V96X_LB_MAPx_MAP_ADR) << 16; 122 } 123 124 /* 125 * Determine the PCI memory space base that our PCI 126 * memory window maps to. 127 */ 128 vt->vt_pci_membase = (V96X_LB_MAP1(vt) & V96X_LB_MAPx_MAP_ADR) << 16; 129 130 /* 131 * Determine the PCI window base that maps host RAM for 132 * DMA. 133 */ 134 vt->vt_dma_winbase = V96X_PCI_BASE1(vt) & 0xfffffff0; 135 } 136 137 void 138 vtpbc_attach_hook(struct device *parent, struct device *self, 139 struct pcibus_attach_args *pba) 140 { 141 } 142 143 int 144 vtpbc_bus_maxdevs(void *v, int busno) 145 { 146 147 return (32); 148 } 149 150 pcitag_t 151 vtpbc_make_tag(void *v, int b, int d, int f) 152 { 153 154 return ((b << 16) | (d << 11) | (f << 8)); 155 } 156 157 void 158 vtpbc_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 159 { 160 161 if (bp != NULL) 162 *bp = (tag >> 16) & 0xff; 163 if (dp != NULL) 164 *dp = (tag >> 11) & 0x1f; 165 if (fp != NULL) 166 *fp = (tag >> 8) & 0x7; 167 } 168 169 static int 170 vtpbc_conf_addr(struct vtpbc_config *vt, pcitag_t tag, int offset, 171 u_int32_t *cfgoff, u_int32_t *ad_low) 172 { 173 int b, d, f; 174 175 vtpbc_decompose_tag(vt, tag, &b, &d, &f); 176 177 if (b == 0) { 178 if (d > (31 - vt->vt_adbase)) 179 return (1); 180 *cfgoff = (1UL << (d + vt->vt_adbase)) | (f << 8) | 181 offset; 182 *ad_low = 0; 183 } else if (vt->vt_rev >= V96X_VREV_C0) { 184 *cfgoff = tag | offset; 185 *ad_low = V96X_LB_MAPx_AD_LOW_EN; 186 } else 187 return (1); 188 189 return (0); 190 } 191 192 pcireg_t 193 vtpbc_conf_read(void *v, pcitag_t tag, int offset) 194 { 195 struct vtpbc_config *vt = v; 196 pcireg_t data; 197 u_int32_t cfgoff, ad_low; 198 int s; 199 u_int16_t errbits; 200 201 if (vtpbc_conf_addr(vt, tag, offset, &cfgoff, &ad_low)) 202 return ((pcireg_t) -1); 203 204 PCI_CONF_LOCK(s); 205 206 /* high 12 bits of address go into map register */ 207 V96X_LB_MAP0(vt) = ((cfgoff >> 16) & V96X_LB_MAPx_MAP_ADR) | 208 ad_low | V96X_LB_TYPE_CONF; 209 210 /* clear aborts */ 211 V96X_PCI_STAT(vt) |= V96X_PCI_STAT_M_ABORT | V96X_PCI_STAT_T_ABORT; 212 213 wbflush(); 214 215 /* low 20 bits of address are offset into config space */ 216 data = *(__volatile u_int32_t *) (vt->vt_cfgbase + (cfgoff & 0xfffff)); 217 218 errbits = V96X_PCI_STAT(vt) & 219 (V96X_PCI_STAT_M_ABORT|V96X_PCI_STAT_T_ABORT); 220 if (errbits) { 221 V96X_PCI_STAT(vt) |= errbits; 222 data = (pcireg_t) -1; 223 } 224 225 PCI_CONF_UNLOCK(s); 226 227 return (data); 228 } 229 230 void 231 vtpbc_conf_write(void *v, pcitag_t tag, int offset, pcireg_t data) 232 { 233 struct vtpbc_config *vt = v; 234 u_int32_t cfgoff, ad_low; 235 int s; 236 237 if (vtpbc_conf_addr(vt, tag, offset, &cfgoff, &ad_low)) 238 panic("vtpbc_conf_write"); 239 240 PCI_CONF_LOCK(s); 241 242 /* high 12 bits of address go into map register */ 243 V96X_LB_MAP0(vt) = ((cfgoff >> 16) & V96X_LB_MAPx_MAP_ADR) | 244 ad_low | V96X_LB_TYPE_CONF; 245 246 /* clear aborts */ 247 V96X_PCI_STAT(vt) |= V96X_PCI_STAT_M_ABORT | V96X_PCI_STAT_T_ABORT; 248 249 wbflush(); 250 251 /* low 20 bits of address are offset into config space */ 252 *(__volatile u_int32_t *) (vt->vt_cfgbase + (cfgoff & 0xfffff)) = data; 253 254 /* wait for FIFO to drain */ 255 while (V96X_FIFO_STAT(vt) & V96X_FIFO_STAT_L2P_WR) 256 /* spin */ ; 257 258 PCI_CONF_UNLOCK(s); 259 } 260
Indexes created Mon Sep 22 10:09:38 GMT 2025