11.5Sthorpej/* $NetBSD: mcclock_gbus.c,v 1.5 2024/03/06 07:34:11 thorpej Exp $ */ 21.1Sthorpej 31.1Sthorpej/* 41.1Sthorpej * Copyright (c) 1997 by Matthew Jacob 51.1Sthorpej * NASA AMES Research Center. 61.1Sthorpej * All rights reserved. 71.1Sthorpej * 81.1Sthorpej * Redistribution and use in source and binary forms, with or without 91.1Sthorpej * modification, are permitted provided that the following conditions 101.1Sthorpej * are met: 111.1Sthorpej * 1. Redistributions of source code must retain the above copyright 121.1Sthorpej * notice immediately at the beginning of the file, without modification, 131.1Sthorpej * this list of conditions, and the following disclaimer. 141.1Sthorpej * 2. Redistributions in binary form must reproduce the above copyright 151.1Sthorpej * notice, this list of conditions and the following disclaimer in the 161.1Sthorpej * documentation and/or other materials provided with the distribution. 171.1Sthorpej * 3. The name of the author may not be used to endorse or promote products 181.1Sthorpej * derived from this software without specific prior written permission. 191.1Sthorpej * 201.1Sthorpej * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 211.1Sthorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 221.1Sthorpej * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 231.1Sthorpej * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 241.1Sthorpej * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 251.1Sthorpej * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 261.1Sthorpej * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 271.1Sthorpej * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 281.1Sthorpej * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 291.1Sthorpej * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 301.1Sthorpej * SUCH DAMAGE. 311.1Sthorpej */ 321.1Sthorpej 331.1Sthorpej#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 341.1Sthorpej 351.5Sthorpej__KERNEL_RCSID(0, "$NetBSD: mcclock_gbus.c,v 1.5 2024/03/06 07:34:11 thorpej Exp $"); 361.1Sthorpej 371.1Sthorpej#include <sys/param.h> 381.1Sthorpej#include <sys/kernel.h> 391.1Sthorpej#include <sys/systm.h> 401.1Sthorpej#include <sys/device.h> 411.1Sthorpej 421.1Sthorpej#include <sys/bus.h> 431.1Sthorpej 441.1Sthorpej#include <alpha/gbus/gbusvar.h> 451.1Sthorpej 461.1Sthorpej#include <dev/clock_subr.h> 471.1Sthorpej 481.1Sthorpej#include <dev/ic/mc146818reg.h> 491.1Sthorpej#include <dev/ic/mc146818var.h> 501.1Sthorpej 511.1Sthorpej#include <alpha/alpha/mcclockvar.h> 521.1Sthorpej 531.1Sthorpej#include "ioconf.h" 541.1Sthorpej 551.2Sthorpejstatic int mcclock_gbus_match(device_t, cfdata_t, void *); 561.2Sthorpejstatic void mcclock_gbus_attach(device_t, device_t, void *); 571.1Sthorpej 581.4SthorpejCFATTACH_DECL_NEW(mcclock_gbus, sizeof(struct mcclock_softc), 591.2Sthorpej mcclock_gbus_match, mcclock_gbus_attach, NULL, NULL); 601.1Sthorpej 611.2Sthorpejstatic void mcclock_gbus_write(struct mc146818_softc *, u_int, u_int); 621.2Sthorpejstatic u_int mcclock_gbus_read(struct mc146818_softc *, u_int); 631.1Sthorpej 641.1Sthorpejstatic int 651.2Sthorpejmcclock_gbus_match(device_t parent, cfdata_t cf, void *aux) 661.1Sthorpej{ 671.1Sthorpej struct gbus_attach_args *ga = aux; 681.1Sthorpej 691.1Sthorpej if (strcmp(ga->ga_name, mcclock_cd.cd_name)) 701.1Sthorpej return (0); 711.1Sthorpej return (1); 721.1Sthorpej} 731.1Sthorpej 741.1Sthorpejstatic void 751.2Sthorpejmcclock_gbus_attach(device_t parent, device_t self, void *aux) 761.1Sthorpej{ 771.4Sthorpej struct mcclock_softc *msc = device_private(self); 781.4Sthorpej struct mc146818_softc *sc = &msc->sc_mc146818; 791.1Sthorpej struct gbus_attach_args *ga = aux; 801.1Sthorpej 811.3Sthorpej sc->sc_dev = self; 821.3Sthorpej sc->sc_bst = ga->ga_iot; 831.3Sthorpej 841.3Sthorpej if (bus_space_map(sc->sc_bst, ga->ga_offset, MC_NREGS+MC_NVRAM_SIZE, 851.3Sthorpej 0, &sc->sc_bsh) != 0) { 861.3Sthorpej panic("mcclock_gbus_attach: couldn't map clock I/O space"); 871.3Sthorpej } 881.1Sthorpej 891.5Sthorpej /* The RTC is accessible only by a CPU on the primary CPU module. */ 901.5Sthorpej msc->sc_primary_only = true; 911.5Sthorpej 921.2Sthorpej sc->sc_mcread = mcclock_gbus_read; 931.2Sthorpej sc->sc_mcwrite = mcclock_gbus_write; 941.1Sthorpej 951.4Sthorpej mcclock_attach(msc); 961.1Sthorpej} 971.1Sthorpej 981.1Sthorpejstatic void 991.2Sthorpejmcclock_gbus_write(struct mc146818_softc *sc, u_int reg, u_int val) 1001.1Sthorpej{ 1011.3Sthorpej bus_space_write_1(sc->sc_bst, sc->sc_bsh, reg, (uint8_t)val); 1021.1Sthorpej} 1031.1Sthorpej 1041.1Sthorpejstatic u_int 1051.2Sthorpejmcclock_gbus_read(struct mc146818_softc *sc, u_int reg) 1061.1Sthorpej{ 1071.3Sthorpej return bus_space_read_1(sc->sc_bst, sc->sc_bsh, reg); 1081.1Sthorpej} 109