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alpha_cpu.h revision 1.2
      1  1.2  cgd /*	$NetBSD: alpha_cpu.h,v 1.2 1996/07/11 03:44:50 cgd Exp $	*/
      2  1.1  cgd 
      3  1.1  cgd /*
      4  1.1  cgd  * Copyright (c) 1996 Carnegie-Mellon University.
      5  1.1  cgd  * All rights reserved.
      6  1.1  cgd  *
      7  1.1  cgd  * Author: Chris G. Demetriou
      8  1.1  cgd  *
      9  1.1  cgd  * Permission to use, copy, modify and distribute this software and
     10  1.1  cgd  * its documentation is hereby granted, provided that both the copyright
     11  1.1  cgd  * notice and this permission notice appear in all copies of the
     12  1.1  cgd  * software, derivative works or modified versions, and any portions
     13  1.1  cgd  * thereof, and that both notices appear in supporting documentation.
     14  1.1  cgd  *
     15  1.1  cgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  1.1  cgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  1.1  cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  1.1  cgd  *
     19  1.1  cgd  * Carnegie Mellon requests users of this software to return to
     20  1.1  cgd  *
     21  1.1  cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  1.1  cgd  *  School of Computer Science
     23  1.1  cgd  *  Carnegie Mellon University
     24  1.1  cgd  *  Pittsburgh PA 15213-3890
     25  1.1  cgd  *
     26  1.1  cgd  * any improvements or extensions that they make and grant Carnegie the
     27  1.1  cgd  * rights to redistribute these changes.
     28  1.1  cgd  */
     29  1.1  cgd 
     30  1.1  cgd #ifndef __ALPHA_ALPHA_CPU_H__
     31  1.1  cgd #define	__ALPHA_ALPHA_CPU_H__
     32  1.1  cgd 
     33  1.1  cgd /*
     34  1.1  cgd  * Alpha CPU + OSF/1 PALcode definitions for use by the kernel.
     35  1.1  cgd  *
     36  1.1  cgd  * Definitions for:
     37  1.1  cgd  *
     38  1.2  cgd  *	Process Control Block
     39  1.2  cgd  *	Interrupt/Exception/Syscall Stack Frame
     40  1.1  cgd  *	Processor Status Register
     41  1.2  cgd  *	Machine Check Error Summary Register
     42  1.2  cgd  *	Machine Check Logout Area
     43  1.1  cgd  *	Virtual Memory Management
     44  1.1  cgd  *	Translation Buffer Invalidation
     45  1.1  cgd  *
     46  1.1  cgd  * and miscellaneous PALcode operations.
     47  1.1  cgd  */
     48  1.1  cgd 
     49  1.1  cgd 
     50  1.1  cgd /*
     51  1.2  cgd  * Process Control Block definitions [OSF/1 PALcode Specific]
     52  1.2  cgd  */
     53  1.2  cgd 
     54  1.2  cgd struct alpha_pcb {
     55  1.2  cgd 	unsigned long	apcb_ksp;	/* kernel stack ptr */
     56  1.2  cgd 	unsigned long	apcb_usp;	/* user stack ptr */
     57  1.2  cgd 	unsigned long	apcb_ptbr;	/* page table base reg */
     58  1.2  cgd 	unsigned int	apcb_cpc;	/* charged process cycles */
     59  1.2  cgd 	unsigned int	apcb_asn;	/* address space number */
     60  1.2  cgd 	unsigned long	apcb_unique;	/* process unique value */
     61  1.2  cgd 	unsigned long	apcb_flags;	/* flags; see below */
     62  1.2  cgd 	unsigned long	apcb_decrsv0;	/* DEC reserved */
     63  1.2  cgd 	unsigned long	apcb_decrsv1;	/* DEC reserved */
     64  1.2  cgd };
     65  1.2  cgd 
     66  1.2  cgd #define	ALPHA_PCB_FLAGS_FEN	0x0000000000000001
     67  1.2  cgd #define	ALPHA_PCB_FLAGS_PME	0x4000000000000000
     68  1.2  cgd 
     69  1.2  cgd /*
     70  1.2  cgd  * Interrupt/Exception/Syscall Stack Frame
     71  1.2  cgd  */
     72  1.2  cgd 
     73  1.2  cgd struct alpha_frame {
     74  1.2  cgd 	unsigned long	af_ps;		/* processor status */
     75  1.2  cgd 	unsigned long	af_pc;		/* program counter */
     76  1.2  cgd 	unsigned long	af_gp;		/* GP */
     77  1.2  cgd 	unsigned long	af_a0;		/* A0 */
     78  1.2  cgd 	unsigned long	af_a1;		/* A1 */
     79  1.2  cgd 	unsigned long	af_a2;		/* A2 */
     80  1.2  cgd };
     81  1.2  cgd 
     82  1.2  cgd /*
     83  1.1  cgd  * Processor Status Register [OSF/1 PALcode Specific]
     84  1.1  cgd  *
     85  1.1  cgd  * Includes user/kernel mode bit, interrupt priority levels, etc.
     86  1.1  cgd  */
     87  1.1  cgd 
     88  1.1  cgd #define	ALPHA_PSL_USERMODE	0x0008		/* set -> user mode */
     89  1.1  cgd #define	ALPHA_PSL_IPL_MASK	0x0007		/* interrupt level mask */
     90  1.1  cgd 
     91  1.1  cgd #define	ALPHA_PSL_IPL_0		0x0000		/* all interrupts enabled */
     92  1.1  cgd #define	ALPHA_PSL_IPL_SOFT	0x0001		/* software ints disabled */
     93  1.1  cgd #define	ALPHA_PSL_IPL_IO	0x0004		/* I/O dev ints disabled */
     94  1.1  cgd #define	ALPHA_PSL_IPL_CLOCK	0x0005		/* clock ints disabled */
     95  1.1  cgd #define	ALPHA_PSL_IPL_HIGH	0x0006		/* all but mchecks disabled */
     96  1.1  cgd 
     97  1.1  cgd #define	ALPHA_PSL_MUST_BE_ZERO	0xfffffffffffffff0
     98  1.1  cgd 
     99  1.1  cgd /* Convenience constants: what must be set/clear in user mode */
    100  1.1  cgd #define	ALPHA_PSL_USERSET	ALPHA_PSL_USERMODE
    101  1.1  cgd #define	ALPHA_PSL_USERCLR	(ALPHA_PSL_MUST_BE_ZERO | ALPHA_PSL_IPL_MASK)
    102  1.1  cgd 
    103  1.2  cgd /*
    104  1.2  cgd  * Machine Check Error Summary Register definitions [OSF/1 PALcode Specific]
    105  1.2  cgd  */
    106  1.1  cgd 
    107  1.2  cgd #define	ALPHA_MCES_IMP							\
    108  1.2  cgd     0xffffffff00000000	/* impl. dependent */
    109  1.2  cgd #define	ALPHA_MCES_RSVD							\
    110  1.2  cgd     0x00000000ffffffe0	/* reserved */
    111  1.2  cgd #define	ALPHA_MCES_DSC							\
    112  1.2  cgd     0x0000000000000010	/* disable system correctable error reporting */
    113  1.2  cgd #define	ALPHA_MCES_DPC							\
    114  1.2  cgd     0x0000000000000008	/* disable processor correctable error reporting */
    115  1.2  cgd #define	ALPHA_MCES_PCE							\
    116  1.2  cgd     0x0000000000000004	/* processor correctable error in progress */
    117  1.2  cgd #define	ALPHA_MCES_SCE							\
    118  1.2  cgd     0x0000000000000002	/* system correctable error in progress */
    119  1.2  cgd #define	ALPHA_MCES_MIP							\
    120  1.2  cgd     0x0000000000000001	/* machine check in progress */
    121  1.2  cgd 
    122  1.2  cgd /*
    123  1.2  cgd  * Machine Check Error Summary Register definitions [OSF/1 PALcode Specific]
    124  1.2  cgd  */
    125  1.2  cgd 
    126  1.2  cgd struct alpha_logout_area {
    127  1.2  cgd 	unsigned int	la_frame_size;		/* frame size */
    128  1.2  cgd 	unsigned int	la_flags;		/* flags; see below */
    129  1.2  cgd 	unsigned int	la_cpu_offset;		/* offset to cpu area */
    130  1.2  cgd 	unsigned int	la_system_offset;	/* offset to system area */
    131  1.2  cgd };
    132  1.2  cgd 
    133  1.2  cgd #define	ALPHA_LOGOUT_FLAGS_RETRY	0x80000000	/* OK to continue */
    134  1.2  cgd #define	ALPHA_LOGOUT_FLAGS_SE		0x40000000	/* second error */
    135  1.2  cgd #define	ALPHA_LOGOUT_FLAGS_SBZ		0x3fffffff	/* should be zero */
    136  1.2  cgd 
    137  1.2  cgd #define	ALPHA_LOGOUT_NOT_BUILT						\
    138  1.2  cgd     (struct alpha_logout_area *)0xffffffffffffffff)
    139  1.2  cgd 
    140  1.2  cgd #define	ALPHA_LOGOUT_PAL_AREA(lap)					\
    141  1.2  cgd     (unsigned long *)((unsigned char *)(lap) + 16)
    142  1.2  cgd #define	ALPHA_LOGOUT_PAL_SIZE(lap)					\
    143  1.2  cgd     ((lap)->la_cpu_offset - 16)
    144  1.2  cgd #define	ALPHA_LOGOUT_CPU_AREA(lap)					\
    145  1.2  cgd     (unsigned long *)((unsigned char *)(lap) + (lap)->la_cpu_offset)
    146  1.2  cgd #define	ALPHA_LOGOUT_CPU_SIZE(lap)					\
    147  1.2  cgd     ((lap)->la_system_offset - (lap)->la_cpu_offset)
    148  1.2  cgd #define	ALPHA_LOGOUT_SYSTEM_AREA(lap)					\
    149  1.2  cgd     (unsigned long *)((unsigned char *)(lap) + (lap)->la_system_offset)
    150  1.2  cgd #define	ALPHA_LOGOUT_SYSTEM_SIZE(lap)					\
    151  1.2  cgd     ((lap)->la_frame_size - (lap)->la_system_offset)
    152  1.2  cgd 
    153  1.1  cgd /*
    154  1.2  cgd  * Virtual Memory Management definitions [OSF/1 PALcode Specific]
    155  1.1  cgd  *
    156  1.1  cgd  * Includes user and kernel space addresses and information,
    157  1.1  cgd  * page table entry definitions, etc.
    158  1.1  cgd  *
    159  1.1  cgd  * NOTE THAT THESE DEFINITIONS MAY CHANGE IN FUTURE ALPHA CPUS!
    160  1.1  cgd  */
    161  1.1  cgd 
    162  1.1  cgd #define	ALPHA_PGSHIFT		13
    163  1.2  cgd #define	ALPHA_PGBYTES		(1 << ALPHA_PGSHIFT)
    164  1.1  cgd 
    165  1.1  cgd #define	ALPHA_USEG_BASE		0			/* virtual */
    166  1.1  cgd #define	ALPHA_USEG_END		0x000003ffffffffff
    167  1.1  cgd 
    168  1.1  cgd #define	ALPHA_K0SEG_BASE	0xfffffc0000000000	/* direct-mapped */
    169  1.1  cgd #define	ALPHA_K0SEG_END		0xfffffe0000000000
    170  1.1  cgd #define	ALPHA_K1SEG_BASE	ALPHA_K0SEG_END		/* virtual */
    171  1.1  cgd #define	ALPHA_K1SEG_END		0xffffffffffffffff
    172  1.1  cgd 
    173  1.1  cgd #define ALPHA_K0SEG_TO_PHYS(x)	((x) & 0x00000003ffffffff)
    174  1.1  cgd #define ALPHA_PHYS_TO_K0SEG(x)	((x) | ALPHA_K0SEG_BASE)
    175  1.1  cgd 
    176  1.1  cgd #define	ALPHA_PTE_VALID			0x0001
    177  1.1  cgd 
    178  1.1  cgd #define	ALPHA_PTE_FAULT_ON_READ		0x0002
    179  1.1  cgd #define	ALPHA_PTE_FAULT_ON_WRITE	0x0004
    180  1.1  cgd #define	ALPHA_PTE_FAULT_ON_EXECUTE	0x0008
    181  1.1  cgd 
    182  1.1  cgd #define	ALPHA_PTE_ASM			0x0010		/* addr. space match */
    183  1.1  cgd #define	ALPHA_PTE_GRANULARITY		0x0060		/* granularity hint */
    184  1.1  cgd 
    185  1.1  cgd #define	ALPHA_PTE_PROT			0xff00
    186  1.1  cgd #define	ALPHA_PTE_KR			0x0100
    187  1.1  cgd #define	ALPHA_PTE_UR			0x0200
    188  1.1  cgd #define	ALPHA_PTE_KW			0x1000
    189  1.1  cgd #define	ALPHA_PTE_UW			0x2000
    190  1.1  cgd 
    191  1.1  cgd #define	ALPHA_PTE_WRITE			(ALPHA_PTE_KW | ALPHA_PTE_KW)
    192  1.1  cgd 
    193  1.1  cgd #define	ALPHA_PTE_SOFTWARE		0xffff0000
    194  1.1  cgd 
    195  1.1  cgd #define	ALPHA_PTE_PFN			0xffffffff00000000
    196  1.1  cgd 
    197  1.1  cgd #define	ALPHA_PTE_TO_PFN(pte)		((pte) >> 32)
    198  1.1  cgd #define	ALPHA_PTE_FROM_PFN(pfn)		((pfn) << 32)
    199  1.1  cgd 
    200  1.1  cgd typedef unsigned long alpha_pt_entry_t;
    201  1.1  cgd 
    202  1.1  cgd 
    203  1.1  cgd /*
    204  1.2  cgd  * Translation Buffer Invalidation definitions [OSF/1 PALcode Specific]
    205  1.1  cgd  */
    206  1.1  cgd 
    207  1.1  cgd #define	TBIA()		alpha_pal_tbi(-2, 0)		/* all TB entries */
    208  1.1  cgd #define	TBIAP()		alpha_pal_tbi(-1, 0)		/* all per-process */
    209  1.1  cgd #define	TBISI(va)	alpha_pal_tbi(1, (va))		/* ITB entry for va */
    210  1.1  cgd #define	TBISD(va)	alpha_pal_tbi(2, (va))		/* DTB entry for va */
    211  1.1  cgd #define	TBIS(va)	alpha_pal_tbi(3, (va))		/* all for va */
    212  1.1  cgd 
    213  1.1  cgd 
    214  1.1  cgd /*
    215  1.1  cgd  * Stubs for Alpha instructions normally inaccessible from C.
    216  1.1  cgd  */
    217  1.2  cgd unsigned long	alpha_rpcc __P((void));
    218  1.1  cgd void		alpha_mb __P((void));
    219  1.1  cgd void		alpha_wmb __P((void));
    220  1.1  cgd 
    221  1.1  cgd /*
    222  1.1  cgd  * Stubs for OSF/1 PALcode operations.
    223  1.1  cgd  */
    224  1.2  cgd void		alpha_pal_bpt __P((unsigned long, unsigned long,
    225  1.2  cgd 		    unsigned long));
    226  1.2  cgd void		alpha_pal_bugchk __P((unsigned long, unsigned long,
    227  1.2  cgd                     unsigned long));
    228  1.2  cgd void		alpha_pal_callsys __P((void));
    229  1.2  cgd void		alpha_pal_gentrap __P((unsigned long, unsigned long,
    230  1.2  cgd                     unsigned long));
    231  1.1  cgd void		alpha_pal_imb __P((void));
    232  1.2  cgd unsigned long	alpha_pal_rdunique __P((void));
    233  1.2  cgd void		alpha_pal_wrunique __P((unsigned long));
    234  1.2  cgd void		alpha_pal_draina __P((void));
    235  1.2  cgd void		alpha_pal_halt __P((void)) __attribute__((__noreturn__));
    236  1.2  cgd unsigned long	alpha_pal_rdmces __P((void));
    237  1.2  cgd unsigned long	alpha_pal_rdps __P((void));
    238  1.2  cgd unsigned long	alpha_pal_rdusp __P((void));
    239  1.2  cgd unsigned long	alpha_pal_rdval __P((void));
    240  1.2  cgd void		alpha_pal_retsys __P((void));
    241  1.2  cgd void		alpha_pal_rti __P((void));
    242  1.2  cgd unsigned long	alpha_pal_swpctx __P((unsigned long));
    243  1.2  cgd unsigned long	alpha_pal_swpipl __P((unsigned long));
    244  1.1  cgd void		alpha_pal_tbi __P((unsigned long, vm_offset_t));
    245  1.2  cgd unsigned long	alpha_pal_whami __P((void));
    246  1.2  cgd void		alpha_pal_wrent __P((void *, unsigned long));
    247  1.2  cgd void		alpha_pal_wrfen __P((unsigned long));
    248  1.2  cgd void		alpha_pal_wrkgp __P((unsigned long));
    249  1.2  cgd void		alpha_pal_wrusp __P((unsigned long));
    250  1.2  cgd void		alpha_pal_wrval __P((unsigned long));
    251  1.2  cgd void		alpha_pal_wrvptptr __P((unsigned long));
    252  1.2  cgd void		alpha_pal_wrmces __P((unsigned long));
    253  1.2  cgd 
    254  1.2  cgd unsigned long	_alpha_pal_swpipl __P((unsigned long));	/* for profiling */
    255  1.1  cgd 
    256  1.1  cgd #endif __ALPHA_ALPHA_CPU_H__
    257