alpha_cpu.h revision 1.2
1 /* $NetBSD: alpha_cpu.h,v 1.2 1996/07/11 03:44:50 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #ifndef __ALPHA_ALPHA_CPU_H__ 31 #define __ALPHA_ALPHA_CPU_H__ 32 33 /* 34 * Alpha CPU + OSF/1 PALcode definitions for use by the kernel. 35 * 36 * Definitions for: 37 * 38 * Process Control Block 39 * Interrupt/Exception/Syscall Stack Frame 40 * Processor Status Register 41 * Machine Check Error Summary Register 42 * Machine Check Logout Area 43 * Virtual Memory Management 44 * Translation Buffer Invalidation 45 * 46 * and miscellaneous PALcode operations. 47 */ 48 49 50 /* 51 * Process Control Block definitions [OSF/1 PALcode Specific] 52 */ 53 54 struct alpha_pcb { 55 unsigned long apcb_ksp; /* kernel stack ptr */ 56 unsigned long apcb_usp; /* user stack ptr */ 57 unsigned long apcb_ptbr; /* page table base reg */ 58 unsigned int apcb_cpc; /* charged process cycles */ 59 unsigned int apcb_asn; /* address space number */ 60 unsigned long apcb_unique; /* process unique value */ 61 unsigned long apcb_flags; /* flags; see below */ 62 unsigned long apcb_decrsv0; /* DEC reserved */ 63 unsigned long apcb_decrsv1; /* DEC reserved */ 64 }; 65 66 #define ALPHA_PCB_FLAGS_FEN 0x0000000000000001 67 #define ALPHA_PCB_FLAGS_PME 0x4000000000000000 68 69 /* 70 * Interrupt/Exception/Syscall Stack Frame 71 */ 72 73 struct alpha_frame { 74 unsigned long af_ps; /* processor status */ 75 unsigned long af_pc; /* program counter */ 76 unsigned long af_gp; /* GP */ 77 unsigned long af_a0; /* A0 */ 78 unsigned long af_a1; /* A1 */ 79 unsigned long af_a2; /* A2 */ 80 }; 81 82 /* 83 * Processor Status Register [OSF/1 PALcode Specific] 84 * 85 * Includes user/kernel mode bit, interrupt priority levels, etc. 86 */ 87 88 #define ALPHA_PSL_USERMODE 0x0008 /* set -> user mode */ 89 #define ALPHA_PSL_IPL_MASK 0x0007 /* interrupt level mask */ 90 91 #define ALPHA_PSL_IPL_0 0x0000 /* all interrupts enabled */ 92 #define ALPHA_PSL_IPL_SOFT 0x0001 /* software ints disabled */ 93 #define ALPHA_PSL_IPL_IO 0x0004 /* I/O dev ints disabled */ 94 #define ALPHA_PSL_IPL_CLOCK 0x0005 /* clock ints disabled */ 95 #define ALPHA_PSL_IPL_HIGH 0x0006 /* all but mchecks disabled */ 96 97 #define ALPHA_PSL_MUST_BE_ZERO 0xfffffffffffffff0 98 99 /* Convenience constants: what must be set/clear in user mode */ 100 #define ALPHA_PSL_USERSET ALPHA_PSL_USERMODE 101 #define ALPHA_PSL_USERCLR (ALPHA_PSL_MUST_BE_ZERO | ALPHA_PSL_IPL_MASK) 102 103 /* 104 * Machine Check Error Summary Register definitions [OSF/1 PALcode Specific] 105 */ 106 107 #define ALPHA_MCES_IMP \ 108 0xffffffff00000000 /* impl. dependent */ 109 #define ALPHA_MCES_RSVD \ 110 0x00000000ffffffe0 /* reserved */ 111 #define ALPHA_MCES_DSC \ 112 0x0000000000000010 /* disable system correctable error reporting */ 113 #define ALPHA_MCES_DPC \ 114 0x0000000000000008 /* disable processor correctable error reporting */ 115 #define ALPHA_MCES_PCE \ 116 0x0000000000000004 /* processor correctable error in progress */ 117 #define ALPHA_MCES_SCE \ 118 0x0000000000000002 /* system correctable error in progress */ 119 #define ALPHA_MCES_MIP \ 120 0x0000000000000001 /* machine check in progress */ 121 122 /* 123 * Machine Check Error Summary Register definitions [OSF/1 PALcode Specific] 124 */ 125 126 struct alpha_logout_area { 127 unsigned int la_frame_size; /* frame size */ 128 unsigned int la_flags; /* flags; see below */ 129 unsigned int la_cpu_offset; /* offset to cpu area */ 130 unsigned int la_system_offset; /* offset to system area */ 131 }; 132 133 #define ALPHA_LOGOUT_FLAGS_RETRY 0x80000000 /* OK to continue */ 134 #define ALPHA_LOGOUT_FLAGS_SE 0x40000000 /* second error */ 135 #define ALPHA_LOGOUT_FLAGS_SBZ 0x3fffffff /* should be zero */ 136 137 #define ALPHA_LOGOUT_NOT_BUILT \ 138 (struct alpha_logout_area *)0xffffffffffffffff) 139 140 #define ALPHA_LOGOUT_PAL_AREA(lap) \ 141 (unsigned long *)((unsigned char *)(lap) + 16) 142 #define ALPHA_LOGOUT_PAL_SIZE(lap) \ 143 ((lap)->la_cpu_offset - 16) 144 #define ALPHA_LOGOUT_CPU_AREA(lap) \ 145 (unsigned long *)((unsigned char *)(lap) + (lap)->la_cpu_offset) 146 #define ALPHA_LOGOUT_CPU_SIZE(lap) \ 147 ((lap)->la_system_offset - (lap)->la_cpu_offset) 148 #define ALPHA_LOGOUT_SYSTEM_AREA(lap) \ 149 (unsigned long *)((unsigned char *)(lap) + (lap)->la_system_offset) 150 #define ALPHA_LOGOUT_SYSTEM_SIZE(lap) \ 151 ((lap)->la_frame_size - (lap)->la_system_offset) 152 153 /* 154 * Virtual Memory Management definitions [OSF/1 PALcode Specific] 155 * 156 * Includes user and kernel space addresses and information, 157 * page table entry definitions, etc. 158 * 159 * NOTE THAT THESE DEFINITIONS MAY CHANGE IN FUTURE ALPHA CPUS! 160 */ 161 162 #define ALPHA_PGSHIFT 13 163 #define ALPHA_PGBYTES (1 << ALPHA_PGSHIFT) 164 165 #define ALPHA_USEG_BASE 0 /* virtual */ 166 #define ALPHA_USEG_END 0x000003ffffffffff 167 168 #define ALPHA_K0SEG_BASE 0xfffffc0000000000 /* direct-mapped */ 169 #define ALPHA_K0SEG_END 0xfffffe0000000000 170 #define ALPHA_K1SEG_BASE ALPHA_K0SEG_END /* virtual */ 171 #define ALPHA_K1SEG_END 0xffffffffffffffff 172 173 #define ALPHA_K0SEG_TO_PHYS(x) ((x) & 0x00000003ffffffff) 174 #define ALPHA_PHYS_TO_K0SEG(x) ((x) | ALPHA_K0SEG_BASE) 175 176 #define ALPHA_PTE_VALID 0x0001 177 178 #define ALPHA_PTE_FAULT_ON_READ 0x0002 179 #define ALPHA_PTE_FAULT_ON_WRITE 0x0004 180 #define ALPHA_PTE_FAULT_ON_EXECUTE 0x0008 181 182 #define ALPHA_PTE_ASM 0x0010 /* addr. space match */ 183 #define ALPHA_PTE_GRANULARITY 0x0060 /* granularity hint */ 184 185 #define ALPHA_PTE_PROT 0xff00 186 #define ALPHA_PTE_KR 0x0100 187 #define ALPHA_PTE_UR 0x0200 188 #define ALPHA_PTE_KW 0x1000 189 #define ALPHA_PTE_UW 0x2000 190 191 #define ALPHA_PTE_WRITE (ALPHA_PTE_KW | ALPHA_PTE_KW) 192 193 #define ALPHA_PTE_SOFTWARE 0xffff0000 194 195 #define ALPHA_PTE_PFN 0xffffffff00000000 196 197 #define ALPHA_PTE_TO_PFN(pte) ((pte) >> 32) 198 #define ALPHA_PTE_FROM_PFN(pfn) ((pfn) << 32) 199 200 typedef unsigned long alpha_pt_entry_t; 201 202 203 /* 204 * Translation Buffer Invalidation definitions [OSF/1 PALcode Specific] 205 */ 206 207 #define TBIA() alpha_pal_tbi(-2, 0) /* all TB entries */ 208 #define TBIAP() alpha_pal_tbi(-1, 0) /* all per-process */ 209 #define TBISI(va) alpha_pal_tbi(1, (va)) /* ITB entry for va */ 210 #define TBISD(va) alpha_pal_tbi(2, (va)) /* DTB entry for va */ 211 #define TBIS(va) alpha_pal_tbi(3, (va)) /* all for va */ 212 213 214 /* 215 * Stubs for Alpha instructions normally inaccessible from C. 216 */ 217 unsigned long alpha_rpcc __P((void)); 218 void alpha_mb __P((void)); 219 void alpha_wmb __P((void)); 220 221 /* 222 * Stubs for OSF/1 PALcode operations. 223 */ 224 void alpha_pal_bpt __P((unsigned long, unsigned long, 225 unsigned long)); 226 void alpha_pal_bugchk __P((unsigned long, unsigned long, 227 unsigned long)); 228 void alpha_pal_callsys __P((void)); 229 void alpha_pal_gentrap __P((unsigned long, unsigned long, 230 unsigned long)); 231 void alpha_pal_imb __P((void)); 232 unsigned long alpha_pal_rdunique __P((void)); 233 void alpha_pal_wrunique __P((unsigned long)); 234 void alpha_pal_draina __P((void)); 235 void alpha_pal_halt __P((void)) __attribute__((__noreturn__)); 236 unsigned long alpha_pal_rdmces __P((void)); 237 unsigned long alpha_pal_rdps __P((void)); 238 unsigned long alpha_pal_rdusp __P((void)); 239 unsigned long alpha_pal_rdval __P((void)); 240 void alpha_pal_retsys __P((void)); 241 void alpha_pal_rti __P((void)); 242 unsigned long alpha_pal_swpctx __P((unsigned long)); 243 unsigned long alpha_pal_swpipl __P((unsigned long)); 244 void alpha_pal_tbi __P((unsigned long, vm_offset_t)); 245 unsigned long alpha_pal_whami __P((void)); 246 void alpha_pal_wrent __P((void *, unsigned long)); 247 void alpha_pal_wrfen __P((unsigned long)); 248 void alpha_pal_wrkgp __P((unsigned long)); 249 void alpha_pal_wrusp __P((unsigned long)); 250 void alpha_pal_wrval __P((unsigned long)); 251 void alpha_pal_wrvptptr __P((unsigned long)); 252 void alpha_pal_wrmces __P((unsigned long)); 253 254 unsigned long _alpha_pal_swpipl __P((unsigned long)); /* for profiling */ 255 256 #endif __ALPHA_ALPHA_CPU_H__ 257
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