alpha_cpu.h revision 1.3
1 /* $NetBSD: alpha_cpu.h,v 1.3 1996/07/11 05:31:29 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #ifndef __ALPHA_ALPHA_CPU_H__ 31 #define __ALPHA_ALPHA_CPU_H__ 32 33 /* 34 * Alpha CPU + OSF/1 PALcode definitions for use by the kernel. 35 * 36 * Definitions for: 37 * 38 * Process Control Block 39 * Interrupt/Exception/Syscall Stack Frame 40 * Processor Status Register 41 * Machine Check Error Summary Register 42 * Machine Check Logout Area 43 * Virtual Memory Management 44 * Translation Buffer Invalidation 45 * 46 * and miscellaneous PALcode operations. 47 */ 48 49 50 /* 51 * Process Control Block definitions [OSF/1 PALcode Specific] 52 */ 53 54 struct alpha_pcb { 55 unsigned long apcb_ksp; /* kernel stack ptr */ 56 unsigned long apcb_usp; /* user stack ptr */ 57 unsigned long apcb_ptbr; /* page table base reg */ 58 unsigned int apcb_cpc; /* charged process cycles */ 59 unsigned int apcb_asn; /* address space number */ 60 unsigned long apcb_unique; /* process unique value */ 61 unsigned long apcb_flags; /* flags; see below */ 62 unsigned long apcb_decrsv0; /* DEC reserved */ 63 unsigned long apcb_decrsv1; /* DEC reserved */ 64 }; 65 66 #define ALPHA_PCB_FLAGS_FEN 0x0000000000000001 67 #define ALPHA_PCB_FLAGS_PME 0x4000000000000000 68 69 /* 70 * Interrupt/Exception/Syscall "Hardware" (really PALcode) 71 * Stack Frame definitions 72 * 73 * These are quadword offsets from the sp on kernel entry, i.e. 74 * to get to the value in question you access (sp + (offset * 8)). 75 * 76 * On syscall entry, A0-A2 aren't written to memory but space 77 * _is_ reserved for them. 78 */ 79 80 #define ALPHA_HWFRAME_PS 0 /* processor status register */ 81 #define ALPHA_HWFRAME_PC 1 /* program counter */ 82 #define ALPHA_HWFRAME_GP 2 /* global pointer */ 83 #define ALPHA_HWFRAME_A0 3 /* a0 */ 84 #define ALPHA_HWFRAME_A1 4 /* a1 */ 85 #define ALPHA_HWFRAME_A2 5 /* a2 */ 86 87 #define ALPHA_HWFRAME_SIZE 6 /* 6 8-byte words */ 88 89 /* 90 * Processor Status Register [OSF/1 PALcode Specific] 91 * 92 * Includes user/kernel mode bit, interrupt priority levels, etc. 93 */ 94 95 #define ALPHA_PSL_USERMODE 0x0008 /* set -> user mode */ 96 #define ALPHA_PSL_IPL_MASK 0x0007 /* interrupt level mask */ 97 98 #define ALPHA_PSL_IPL_0 0x0000 /* all interrupts enabled */ 99 #define ALPHA_PSL_IPL_SOFT 0x0001 /* software ints disabled */ 100 #define ALPHA_PSL_IPL_IO 0x0004 /* I/O dev ints disabled */ 101 #define ALPHA_PSL_IPL_CLOCK 0x0005 /* clock ints disabled */ 102 #define ALPHA_PSL_IPL_HIGH 0x0006 /* all but mchecks disabled */ 103 104 #define ALPHA_PSL_MUST_BE_ZERO 0xfffffffffffffff0 105 106 /* Convenience constants: what must be set/clear in user mode */ 107 #define ALPHA_PSL_USERSET ALPHA_PSL_USERMODE 108 #define ALPHA_PSL_USERCLR (ALPHA_PSL_MUST_BE_ZERO | ALPHA_PSL_IPL_MASK) 109 110 /* 111 * Machine Check Error Summary Register definitions [OSF/1 PALcode Specific] 112 */ 113 114 #define ALPHA_MCES_IMP \ 115 0xffffffff00000000 /* impl. dependent */ 116 #define ALPHA_MCES_RSVD \ 117 0x00000000ffffffe0 /* reserved */ 118 #define ALPHA_MCES_DSC \ 119 0x0000000000000010 /* disable system correctable error reporting */ 120 #define ALPHA_MCES_DPC \ 121 0x0000000000000008 /* disable processor correctable error reporting */ 122 #define ALPHA_MCES_PCE \ 123 0x0000000000000004 /* processor correctable error in progress */ 124 #define ALPHA_MCES_SCE \ 125 0x0000000000000002 /* system correctable error in progress */ 126 #define ALPHA_MCES_MIP \ 127 0x0000000000000001 /* machine check in progress */ 128 129 /* 130 * Machine Check Error Summary Register definitions [OSF/1 PALcode Specific] 131 */ 132 133 struct alpha_logout_area { 134 unsigned int la_frame_size; /* frame size */ 135 unsigned int la_flags; /* flags; see below */ 136 unsigned int la_cpu_offset; /* offset to cpu area */ 137 unsigned int la_system_offset; /* offset to system area */ 138 }; 139 140 #define ALPHA_LOGOUT_FLAGS_RETRY 0x80000000 /* OK to continue */ 141 #define ALPHA_LOGOUT_FLAGS_SE 0x40000000 /* second error */ 142 #define ALPHA_LOGOUT_FLAGS_SBZ 0x3fffffff /* should be zero */ 143 144 #define ALPHA_LOGOUT_NOT_BUILT \ 145 (struct alpha_logout_area *)0xffffffffffffffff) 146 147 #define ALPHA_LOGOUT_PAL_AREA(lap) \ 148 (unsigned long *)((unsigned char *)(lap) + 16) 149 #define ALPHA_LOGOUT_PAL_SIZE(lap) \ 150 ((lap)->la_cpu_offset - 16) 151 #define ALPHA_LOGOUT_CPU_AREA(lap) \ 152 (unsigned long *)((unsigned char *)(lap) + (lap)->la_cpu_offset) 153 #define ALPHA_LOGOUT_CPU_SIZE(lap) \ 154 ((lap)->la_system_offset - (lap)->la_cpu_offset) 155 #define ALPHA_LOGOUT_SYSTEM_AREA(lap) \ 156 (unsigned long *)((unsigned char *)(lap) + (lap)->la_system_offset) 157 #define ALPHA_LOGOUT_SYSTEM_SIZE(lap) \ 158 ((lap)->la_frame_size - (lap)->la_system_offset) 159 160 /* 161 * Virtual Memory Management definitions [OSF/1 PALcode Specific] 162 * 163 * Includes user and kernel space addresses and information, 164 * page table entry definitions, etc. 165 * 166 * NOTE THAT THESE DEFINITIONS MAY CHANGE IN FUTURE ALPHA CPUS! 167 */ 168 169 #define ALPHA_PGSHIFT 13 170 #define ALPHA_PGBYTES (1 << ALPHA_PGSHIFT) 171 172 #define ALPHA_USEG_BASE 0 /* virtual */ 173 #define ALPHA_USEG_END 0x000003ffffffffff 174 175 #define ALPHA_K0SEG_BASE 0xfffffc0000000000 /* direct-mapped */ 176 #define ALPHA_K0SEG_END 0xfffffe0000000000 177 #define ALPHA_K1SEG_BASE ALPHA_K0SEG_END /* virtual */ 178 #define ALPHA_K1SEG_END 0xffffffffffffffff 179 180 #define ALPHA_K0SEG_TO_PHYS(x) ((x) & 0x00000003ffffffff) 181 #define ALPHA_PHYS_TO_K0SEG(x) ((x) | ALPHA_K0SEG_BASE) 182 183 #define ALPHA_PTE_VALID 0x0001 184 185 #define ALPHA_PTE_FAULT_ON_READ 0x0002 186 #define ALPHA_PTE_FAULT_ON_WRITE 0x0004 187 #define ALPHA_PTE_FAULT_ON_EXECUTE 0x0008 188 189 #define ALPHA_PTE_ASM 0x0010 /* addr. space match */ 190 #define ALPHA_PTE_GRANULARITY 0x0060 /* granularity hint */ 191 192 #define ALPHA_PTE_PROT 0xff00 193 #define ALPHA_PTE_KR 0x0100 194 #define ALPHA_PTE_UR 0x0200 195 #define ALPHA_PTE_KW 0x1000 196 #define ALPHA_PTE_UW 0x2000 197 198 #define ALPHA_PTE_WRITE (ALPHA_PTE_KW | ALPHA_PTE_KW) 199 200 #define ALPHA_PTE_SOFTWARE 0xffff0000 201 202 #define ALPHA_PTE_PFN 0xffffffff00000000 203 204 #define ALPHA_PTE_TO_PFN(pte) ((pte) >> 32) 205 #define ALPHA_PTE_FROM_PFN(pfn) ((pfn) << 32) 206 207 typedef unsigned long alpha_pt_entry_t; 208 209 210 /* 211 * Translation Buffer Invalidation definitions [OSF/1 PALcode Specific] 212 */ 213 214 #define TBIA() alpha_pal_tbi(-2, 0) /* all TB entries */ 215 #define TBIAP() alpha_pal_tbi(-1, 0) /* all per-process */ 216 #define TBISI(va) alpha_pal_tbi(1, (va)) /* ITB entry for va */ 217 #define TBISD(va) alpha_pal_tbi(2, (va)) /* DTB entry for va */ 218 #define TBIS(va) alpha_pal_tbi(3, (va)) /* all for va */ 219 220 221 /* 222 * Stubs for Alpha instructions normally inaccessible from C. 223 */ 224 unsigned long alpha_rpcc __P((void)); 225 void alpha_mb __P((void)); 226 void alpha_wmb __P((void)); 227 228 /* 229 * Stubs for OSF/1 PALcode operations. 230 */ 231 void alpha_pal_bpt __P((unsigned long, unsigned long, 232 unsigned long)); 233 void alpha_pal_bugchk __P((unsigned long, unsigned long, 234 unsigned long)); 235 void alpha_pal_callsys __P((void)); 236 void alpha_pal_gentrap __P((unsigned long, unsigned long, 237 unsigned long)); 238 void alpha_pal_imb __P((void)); 239 unsigned long alpha_pal_rdunique __P((void)); 240 void alpha_pal_wrunique __P((unsigned long)); 241 void alpha_pal_draina __P((void)); 242 void alpha_pal_halt __P((void)) __attribute__((__noreturn__)); 243 unsigned long alpha_pal_rdmces __P((void)); 244 unsigned long alpha_pal_rdps __P((void)); 245 unsigned long alpha_pal_rdusp __P((void)); 246 unsigned long alpha_pal_rdval __P((void)); 247 void alpha_pal_retsys __P((void)); 248 void alpha_pal_rti __P((void)); 249 unsigned long alpha_pal_swpctx __P((unsigned long)); 250 unsigned long alpha_pal_swpipl __P((unsigned long)); 251 void alpha_pal_tbi __P((unsigned long, vm_offset_t)); 252 unsigned long alpha_pal_whami __P((void)); 253 void alpha_pal_wrent __P((void *, unsigned long)); 254 void alpha_pal_wrfen __P((unsigned long)); 255 void alpha_pal_wrkgp __P((unsigned long)); 256 void alpha_pal_wrusp __P((unsigned long)); 257 void alpha_pal_wrval __P((unsigned long)); 258 void alpha_pal_wrvptptr __P((unsigned long)); 259 void alpha_pal_wrmces __P((unsigned long)); 260 261 unsigned long _alpha_pal_swpipl __P((unsigned long)); /* for profiling */ 262 263 #endif __ALPHA_ALPHA_CPU_H__ 264
Indexes created Mon Sep 29 21:09:56 GMT 2025