1 1.4 andvar /* $NetBSD: cfbreg.h,v 1.4 2022/06/03 17:04:54 andvar Exp $ */ 2 1.1 cgd 3 1.1 cgd /* 4 1.1 cgd * Copyright (c) 1996 Carnegie-Mellon University. 5 1.1 cgd * All rights reserved. 6 1.1 cgd * 7 1.1 cgd * Author: Chris G. Demetriou 8 1.1 cgd * 9 1.1 cgd * Permission to use, copy, modify and distribute this software and 10 1.1 cgd * its documentation is hereby granted, provided that both the copyright 11 1.1 cgd * notice and this permission notice appear in all copies of the 12 1.1 cgd * software, derivative works or modified versions, and any portions 13 1.1 cgd * thereof, and that both notices appear in supporting documentation. 14 1.1 cgd * 15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 1.1 cgd * 19 1.1 cgd * Carnegie Mellon requests users of this software to return to 20 1.1 cgd * 21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 1.1 cgd * School of Computer Science 23 1.1 cgd * Carnegie Mellon University 24 1.1 cgd * Pittsburgh PA 15213-3890 25 1.1 cgd * 26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the 27 1.1 cgd * rights to redistribute these changes. 28 1.1 cgd */ 29 1.1 cgd 30 1.1 cgd /* 31 1.1 cgd * Color Frame Buffer definitions, from: 32 1.1 cgd * ``PMAG-BA TURBOchannel Color Frame Buffer Functional Specification 33 1.4 andvar * (Revision 1.2)''. 34 1.1 cgd * 35 1.3 flxd * All definitions are in "dense" TURBOchannel space. 36 1.1 cgd */ 37 1.1 cgd 38 1.1 cgd /* 39 1.1 cgd * Size of the CFB address space. 40 1.1 cgd */ 41 1.1 cgd #define CFB_SIZE 0x400000 42 1.1 cgd 43 1.1 cgd /* 44 1.1 cgd * Offsets into slot space of each functional unit. 45 1.1 cgd */ 46 1.1 cgd #define CFB_FB_OFFSET 0x000000 /* Frame buffer */ 47 1.1 cgd #define CFB_FB_SIZE 0x100000 48 1.1 cgd #define CFB_RAMDAC_OFFSET 0x200000 /* Bt495 RAMDAC Registers */ 49 1.1 cgd #define CFB_RAMDAC_SIZE 0x100000 50 1.1 cgd #define CFB_IREQCTRL_OFFSET 0x300000 /* IReq Control region */ 51 1.1 cgd #define CFB_IREQCTRL_SIZE 0x080000 52 1.1 cgd 53 1.1 cgd /* 54 1.1 cgd * Bt459 RAMDAC registers (offsets from CFB_RAMDAC_OFFSET) 55 1.1 cgd */ 56 1.1 cgd #define CFB_RAMDAC_ADDRLOW 0x0000 /* Address register low byte */ 57 1.1 cgd #define CFB_RAMDAC_ADDRHIGH 0x0004 /* Address register high byte */ 58 1.1 cgd #define CFB_RAMDAC_REGDATA 0x0008 /* Register addressed by addr reg */ 59 1.1 cgd #define CFB_RAMDAC_CMAPDATA 0x000c /* Colormap loc addressed by addr reg */ 60