cpu.h revision 1.74       1  1.74    martin /* $NetBSD: cpu.h,v 1.74 2008/04/28 20:23:11 martin Exp $ */
      2  1.32   thorpej 
      3  1.32   thorpej /*-
      4  1.56   thorpej  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
      5  1.32   thorpej  * All rights reserved.
      6  1.32   thorpej  *
      7  1.32   thorpej  * This code is derived from software contributed to The NetBSD Foundation
      8  1.32   thorpej  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  1.49   mycroft  * NASA Ames Research Center, and by Charles M. Hannum.
     10  1.32   thorpej  *
     11  1.32   thorpej  * Redistribution and use in source and binary forms, with or without
     12  1.32   thorpej  * modification, are permitted provided that the following conditions
     13  1.32   thorpej  * are met:
     14  1.32   thorpej  * 1. Redistributions of source code must retain the above copyright
     15  1.32   thorpej  *    notice, this list of conditions and the following disclaimer.
     16  1.32   thorpej  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.32   thorpej  *    notice, this list of conditions and the following disclaimer in the
     18  1.32   thorpej  *    documentation and/or other materials provided with the distribution.
     19  1.32   thorpej  *
     20  1.32   thorpej  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  1.32   thorpej  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  1.32   thorpej  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  1.32   thorpej  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  1.32   thorpej  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  1.32   thorpej  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  1.32   thorpej  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  1.32   thorpej  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  1.32   thorpej  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  1.32   thorpej  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  1.32   thorpej  * POSSIBILITY OF SUCH DAMAGE.
     31  1.32   thorpej  */
     32   1.1       cgd 
     33   1.1       cgd /*
     34   1.1       cgd  * Copyright (c) 1982, 1990, 1993
     35   1.1       cgd  *	The Regents of the University of California.  All rights reserved.
     36  1.61       agc  *
     37  1.61       agc  * This code is derived from software contributed to Berkeley by
     38  1.61       agc  * the Systems Programming Group of the University of Utah Computer
     39  1.61       agc  * Science Department.
     40  1.61       agc  *
     41  1.61       agc  * Redistribution and use in source and binary forms, with or without
     42  1.61       agc  * modification, are permitted provided that the following conditions
     43  1.61       agc  * are met:
     44  1.61       agc  * 1. Redistributions of source code must retain the above copyright
     45  1.61       agc  *    notice, this list of conditions and the following disclaimer.
     46  1.61       agc  * 2. Redistributions in binary form must reproduce the above copyright
     47  1.61       agc  *    notice, this list of conditions and the following disclaimer in the
     48  1.61       agc  *    documentation and/or other materials provided with the distribution.
     49  1.61       agc  * 3. Neither the name of the University nor the names of its contributors
     50  1.61       agc  *    may be used to endorse or promote products derived from this software
     51  1.61       agc  *    without specific prior written permission.
     52  1.61       agc  *
     53  1.61       agc  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     54  1.61       agc  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     55  1.61       agc  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     56  1.61       agc  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     57  1.61       agc  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     58  1.61       agc  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     59  1.61       agc  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     60  1.61       agc  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     61  1.61       agc  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     62  1.61       agc  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     63  1.61       agc  * SUCH DAMAGE.
     64  1.61       agc  *
     65  1.61       agc  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     66  1.61       agc  *
     67  1.61       agc  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     68  1.61       agc  */
     69  1.61       agc /*
     70  1.61       agc  * Copyright (c) 1988 University of Utah.
     71   1.1       cgd  *
     72   1.1       cgd  * This code is derived from software contributed to Berkeley by
     73   1.1       cgd  * the Systems Programming Group of the University of Utah Computer
     74   1.1       cgd  * Science Department.
     75   1.1       cgd  *
     76   1.1       cgd  * Redistribution and use in source and binary forms, with or without
     77   1.1       cgd  * modification, are permitted provided that the following conditions
     78   1.1       cgd  * are met:
     79   1.1       cgd  * 1. Redistributions of source code must retain the above copyright
     80   1.1       cgd  *    notice, this list of conditions and the following disclaimer.
     81   1.1       cgd  * 2. Redistributions in binary form must reproduce the above copyright
     82   1.1       cgd  *    notice, this list of conditions and the following disclaimer in the
     83   1.1       cgd  *    documentation and/or other materials provided with the distribution.
     84   1.1       cgd  * 3. All advertising materials mentioning features or use of this software
     85   1.1       cgd  *    must display the following acknowledgement:
     86   1.1       cgd  *	This product includes software developed by the University of
     87   1.1       cgd  *	California, Berkeley and its contributors.
     88   1.1       cgd  * 4. Neither the name of the University nor the names of its contributors
     89   1.1       cgd  *    may be used to endorse or promote products derived from this software
     90   1.1       cgd  *    without specific prior written permission.
     91   1.1       cgd  *
     92   1.1       cgd  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     93   1.1       cgd  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     94   1.1       cgd  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     95   1.1       cgd  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     96   1.1       cgd  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     97   1.1       cgd  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     98   1.1       cgd  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     99   1.1       cgd  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    100   1.1       cgd  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    101   1.1       cgd  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    102   1.1       cgd  * SUCH DAMAGE.
    103   1.1       cgd  *
    104   1.1       cgd  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
    105   1.1       cgd  *
    106   1.1       cgd  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
    107   1.1       cgd  */
    108   1.1       cgd 
    109   1.1       cgd #ifndef _ALPHA_CPU_H_
    110   1.1       cgd #define _ALPHA_CPU_H_
    111   1.1       cgd 
    112  1.58       mrg #if defined(_KERNEL_OPT)
    113  1.32   thorpej #include "opt_multiprocessor.h"
    114  1.39   thorpej #include "opt_lockdebug.h"
    115  1.32   thorpej #endif
    116  1.32   thorpej 
    117   1.1       cgd /*
    118   1.1       cgd  * Exported definitions unique to Alpha cpu support.
    119   1.1       cgd  */
    120  1.34   thorpej 
    121  1.34   thorpej #include <machine/alpha_cpu.h>
    122   1.1       cgd 
    123  1.33   thorpej #ifdef _KERNEL
    124  1.63      yamt #include <sys/cpu_data.h>
    125  1.71   tsutsui #include <sys/cctr.h>
    126   1.1       cgd #include <machine/frame.h>
    127  1.32   thorpej 
    128  1.37   thorpej /*
    129  1.37   thorpej  * Machine check information.
    130  1.37   thorpej  */
    131  1.37   thorpej struct mchkinfo {
    132  1.65     perry 	volatile int mc_expected;	/* machine check is expected */
    133  1.65     perry 	volatile int mc_received;	/* machine check was received */
    134  1.37   thorpej };
    135  1.37   thorpej 
    136  1.32   thorpej struct cpu_info {
    137  1.32   thorpej 	/*
    138  1.70    mhitch 	 * Private members accessed in assembly with 8 bit offsets.
    139  1.70    mhitch 	 */
    140  1.70    mhitch 	struct lwp *ci_fpcurlwp;	/* current owner of the FPU */
    141  1.70    mhitch 	paddr_t ci_curpcb;		/* PA of current HW PCB */
    142  1.70    mhitch 
    143  1.70    mhitch 	/*
    144  1.32   thorpej 	 * Public members.
    145  1.32   thorpej 	 */
    146  1.59   thorpej 	struct lwp *ci_curlwp;		/* current owner of the processor */
    147  1.63      yamt 	struct cpu_data ci_data;	/* MI per-cpu data */
    148  1.71   tsutsui 	struct cctr_state ci_cc;	/* cycle counter state */
    149  1.54   thorpej 	struct cpu_info *ci_next;	/* next cpu_info structure */
    150  1.66        ad 	int ci_mtx_count;
    151  1.66        ad 	int ci_mtx_oldspl;
    152  1.39   thorpej 
    153  1.32   thorpej 	/*
    154  1.32   thorpej 	 * Private members.
    155  1.32   thorpej 	 */
    156  1.39   thorpej 	struct mchkinfo ci_mcinfo;	/* machine check info */
    157  1.39   thorpej 	cpuid_t ci_cpuid;		/* our CPU ID */
    158  1.43   thorpej 	struct cpu_softc *ci_softc;	/* pointer to our device */
    159  1.40   thorpej 	u_long ci_want_resched;		/* preempt current process */
    160  1.42   thorpej 	u_long ci_intrdepth;		/* interrupt trap depth */
    161  1.48   thorpej 	struct trapframe *ci_db_regs;	/* registers for debuggers */
    162  1.71   tsutsui 	uint64_t ci_pcc_freq;		/* cpu cycles/second */
    163  1.56   thorpej 
    164  1.40   thorpej #if defined(MULTIPROCESSOR)
    165  1.65     perry 	volatile u_long ci_flags;	/* flags; see below */
    166  1.65     perry 	volatile u_long ci_ipis;	/* interprocessor interrupts pending */
    167  1.40   thorpej #endif
    168  1.32   thorpej };
    169  1.32   thorpej 
    170  1.32   thorpej #define	CPUF_PRIMARY	0x01		/* CPU is primary CPU */
    171  1.32   thorpej #define	CPUF_PRESENT	0x02		/* CPU is present */
    172  1.32   thorpej #define	CPUF_RUNNING	0x04		/* CPU is running */
    173  1.48   thorpej #define	CPUF_PAUSED	0x08		/* CPU is paused */
    174  1.53   thorpej #define	CPUF_FPUSAVE	0x10		/* CPU is currently in fpusave_cpu() */
    175  1.32   thorpej 
    176  1.54   thorpej extern	struct cpu_info cpu_info_primary;
    177  1.54   thorpej extern	struct cpu_info *cpu_info_list;
    178  1.54   thorpej 
    179  1.54   thorpej #define	CPU_INFO_ITERATOR		int
    180  1.54   thorpej #define	CPU_INFO_FOREACH(cii, ci)	cii = 0, ci = cpu_info_list; \
    181  1.54   thorpej 					ci != NULL; ci = ci->ci_next
    182  1.54   thorpej 
    183  1.40   thorpej #if defined(MULTIPROCESSOR)
    184  1.65     perry extern	volatile u_long cpus_running;
    185  1.65     perry extern	volatile u_long cpus_paused;
    186  1.54   thorpej extern	struct cpu_info *cpu_info[];
    187  1.32   thorpej 
    188  1.41   thorpej #define	curcpu()		((struct cpu_info *)alpha_pal_rdval())
    189  1.41   thorpej #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
    190  1.32   thorpej 
    191  1.44   thorpej void	cpu_boot_secondary_processors(void);
    192  1.45   thorpej 
    193  1.45   thorpej void	cpu_pause_resume(unsigned long, int);
    194  1.45   thorpej void	cpu_pause_resume_all(int);
    195  1.39   thorpej #else /* ! MULTIPROCESSOR */
    196  1.54   thorpej #define	curcpu()	(&cpu_info_primary)
    197  1.32   thorpej #endif /* MULTIPROCESSOR */
    198  1.38   thorpej 
    199  1.59   thorpej #define	curlwp		curcpu()->ci_curlwp
    200  1.59   thorpej #define	fpcurlwp	curcpu()->ci_fpcurlwp
    201  1.40   thorpej #define	curpcb		curcpu()->ci_curpcb
    202  1.40   thorpej 
    203   1.1       cgd /*
    204   1.1       cgd  * definitions of cpu-dependent requirements
    205   1.1       cgd  * referenced in generic code
    206   1.1       cgd  */
    207  1.31   thorpej #define	cpu_number()		alpha_pal_whami()
    208  1.59   thorpej #define	cpu_proc_fork(p1, p2)	/* nothing */
    209   1.1       cgd 
    210   1.1       cgd /*
    211   1.1       cgd  * Arguments to hardclock and gatherstats encapsulate the previous
    212   1.1       cgd  * machine state in an opaque clockframe.  One the Alpha, we use
    213   1.1       cgd  * what we push on an interrupt (a trapframe).
    214   1.1       cgd  */
    215   1.1       cgd struct clockframe {
    216   1.1       cgd 	struct trapframe	cf_tf;
    217   1.1       cgd };
    218   1.9       cgd #define	CLKF_USERMODE(framep)						\
    219  1.11       cgd 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
    220  1.11       cgd #define	CLKF_PC(framep)		((framep)->cf_tf.tf_regs[FRAME_PC])
    221  1.42   thorpej 
    222   1.1       cgd /*
    223  1.42   thorpej  * This isn't perfect; if the clock interrupt comes in before the
    224  1.42   thorpej  * r/m/w cycle is complete, we won't be counted... but it's not
    225  1.42   thorpej  * like this stastic has to be extremely accurate.
    226   1.1       cgd  */
    227  1.42   thorpej #define	CLKF_INTR(framep)	(curcpu()->ci_intrdepth)
    228  1.49   mycroft 
    229  1.49   mycroft /*
    230  1.49   mycroft  * This is used during profiling to integrate system time.  It can safely
    231  1.49   mycroft  * assume that the process is resident.
    232  1.49   mycroft  */
    233  1.59   thorpej #define	LWP_PC(p)		((l)->l_md.md_tf->tf_regs[FRAME_PC])
    234   1.1       cgd 
    235   1.1       cgd /*
    236   1.1       cgd  * Give a profiling tick to the current process when the user profiling
    237  1.40   thorpej  * buffer pages are invalid.  On the Alpha, request an AST to send us
    238   1.1       cgd  * through trap, marking the proc as needing a profiling tick.
    239   1.1       cgd  */
    240  1.66        ad #define	cpu_need_proftick(l)						\
    241  1.40   thorpej do {									\
    242  1.66        ad 	(l)->l_pflag |= LP_OWEUPC;					\
    243  1.66        ad 	aston(l);							\
    244  1.40   thorpej } while (/*CONSTCOND*/0)
    245   1.1       cgd 
    246   1.1       cgd /*
    247   1.1       cgd  * Notify the current process (p) that it has a signal pending,
    248   1.1       cgd  * process as soon as possible.
    249   1.1       cgd  */
    250  1.66        ad #define	cpu_signotify(l)	aston(l)
    251   1.1       cgd 
    252  1.40   thorpej /*
    253  1.40   thorpej  * XXXSMP
    254  1.40   thorpej  * Should we send an AST IPI?  Or just let it handle it next time
    255  1.40   thorpej  * it sees a normal kernel entry?  I guess letting it happen later
    256  1.40   thorpej  * follows the `asynchronous' part of the name...
    257  1.40   thorpej  */
    258  1.66        ad #define	aston(l)	((l)->l_md.md_astpending = 1)
    259  1.33   thorpej #endif /* _KERNEL */
    260   1.1       cgd 
    261   1.1       cgd /*
    262   1.1       cgd  * CTL_MACHDEP definitions.
    263   1.1       cgd  */
    264   1.1       cgd #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    265   1.8       cgd #define	CPU_ROOT_DEVICE		2	/* string: root device name */
    266  1.12       cgd #define	CPU_UNALIGNED_PRINT	3	/* int: print unaligned accesses */
    267  1.12       cgd #define	CPU_UNALIGNED_FIX	4	/* int: fix unaligned accesses */
    268  1.12       cgd #define	CPU_UNALIGNED_SIGBUS	5	/* int: SIGBUS unaligned accesses */
    269  1.14       cgd #define	CPU_BOOTED_KERNEL	6	/* string: booted kernel name */
    270  1.55      ross #define	CPU_FP_SYNC_COMPLETE	7	/* int: always fixup sync fp traps */
    271  1.55      ross #define	CPU_MAXID		8	/* 7 valid machdep IDs */
    272   1.1       cgd 
    273  1.13       cgd #ifdef _KERNEL
    274  1.13       cgd 
    275  1.13       cgd struct pcb;
    276  1.13       cgd struct proc;
    277  1.13       cgd struct reg;
    278  1.13       cgd struct rpb;
    279  1.13       cgd struct trapframe;
    280  1.57  sommerfe 
    281  1.44   thorpej int	badaddr(void *, size_t);
    282  1.13       cgd 
    283  1.68      yamt #define	cpu_idle()	/* nothing */
    284  1.68      yamt 
    285  1.13       cgd #endif /* _KERNEL */
    286   1.1       cgd #endif /* _ALPHA_CPU_H_ */
    287