cpu.h revision 1.75.4.1 1 1.75.4.1 bouyer /* $NetBSD: cpu.h,v 1.75.4.1 2011/02/17 11:59:29 bouyer Exp $ */
2 1.32 thorpej
3 1.32 thorpej /*-
4 1.56 thorpej * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
5 1.32 thorpej * All rights reserved.
6 1.32 thorpej *
7 1.32 thorpej * This code is derived from software contributed to The NetBSD Foundation
8 1.32 thorpej * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.49 mycroft * NASA Ames Research Center, and by Charles M. Hannum.
10 1.32 thorpej *
11 1.32 thorpej * Redistribution and use in source and binary forms, with or without
12 1.32 thorpej * modification, are permitted provided that the following conditions
13 1.32 thorpej * are met:
14 1.32 thorpej * 1. Redistributions of source code must retain the above copyright
15 1.32 thorpej * notice, this list of conditions and the following disclaimer.
16 1.32 thorpej * 2. Redistributions in binary form must reproduce the above copyright
17 1.32 thorpej * notice, this list of conditions and the following disclaimer in the
18 1.32 thorpej * documentation and/or other materials provided with the distribution.
19 1.32 thorpej *
20 1.32 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.32 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.32 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.32 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.32 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.32 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.32 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.32 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.32 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.32 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.32 thorpej * POSSIBILITY OF SUCH DAMAGE.
31 1.32 thorpej */
32 1.1 cgd
33 1.1 cgd /*
34 1.75.4.1 bouyer * Copyright (c) 1988 University of Utah.
35 1.1 cgd * Copyright (c) 1982, 1990, 1993
36 1.1 cgd * The Regents of the University of California. All rights reserved.
37 1.61 agc *
38 1.61 agc * This code is derived from software contributed to Berkeley by
39 1.61 agc * the Systems Programming Group of the University of Utah Computer
40 1.61 agc * Science Department.
41 1.61 agc *
42 1.61 agc * Redistribution and use in source and binary forms, with or without
43 1.61 agc * modification, are permitted provided that the following conditions
44 1.61 agc * are met:
45 1.61 agc * 1. Redistributions of source code must retain the above copyright
46 1.61 agc * notice, this list of conditions and the following disclaimer.
47 1.61 agc * 2. Redistributions in binary form must reproduce the above copyright
48 1.61 agc * notice, this list of conditions and the following disclaimer in the
49 1.61 agc * documentation and/or other materials provided with the distribution.
50 1.61 agc * 3. Neither the name of the University nor the names of its contributors
51 1.61 agc * may be used to endorse or promote products derived from this software
52 1.61 agc * without specific prior written permission.
53 1.61 agc *
54 1.61 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
55 1.61 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
56 1.61 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
57 1.61 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
58 1.61 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
59 1.61 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
60 1.61 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
61 1.61 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
62 1.61 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
63 1.61 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 1.61 agc * SUCH DAMAGE.
65 1.61 agc *
66 1.61 agc * from: Utah $Hdr: cpu.h 1.16 91/03/25$
67 1.61 agc *
68 1.61 agc * @(#)cpu.h 8.4 (Berkeley) 1/5/94
69 1.61 agc */
70 1.1 cgd
71 1.1 cgd #ifndef _ALPHA_CPU_H_
72 1.1 cgd #define _ALPHA_CPU_H_
73 1.1 cgd
74 1.58 mrg #if defined(_KERNEL_OPT)
75 1.32 thorpej #include "opt_multiprocessor.h"
76 1.39 thorpej #include "opt_lockdebug.h"
77 1.32 thorpej #endif
78 1.32 thorpej
79 1.1 cgd /*
80 1.1 cgd * Exported definitions unique to Alpha cpu support.
81 1.1 cgd */
82 1.34 thorpej
83 1.34 thorpej #include <machine/alpha_cpu.h>
84 1.1 cgd
85 1.75 he #if defined(_KERNEL) || defined(_KMEMUSER)
86 1.63 yamt #include <sys/cpu_data.h>
87 1.75 he #ifndef _KMEMUSER
88 1.71 tsutsui #include <sys/cctr.h>
89 1.1 cgd #include <machine/frame.h>
90 1.75 he #endif
91 1.32 thorpej
92 1.37 thorpej /*
93 1.37 thorpej * Machine check information.
94 1.37 thorpej */
95 1.37 thorpej struct mchkinfo {
96 1.65 perry volatile int mc_expected; /* machine check is expected */
97 1.65 perry volatile int mc_received; /* machine check was received */
98 1.37 thorpej };
99 1.37 thorpej
100 1.32 thorpej struct cpu_info {
101 1.32 thorpej /*
102 1.70 mhitch * Private members accessed in assembly with 8 bit offsets.
103 1.70 mhitch */
104 1.70 mhitch struct lwp *ci_fpcurlwp; /* current owner of the FPU */
105 1.70 mhitch paddr_t ci_curpcb; /* PA of current HW PCB */
106 1.70 mhitch
107 1.70 mhitch /*
108 1.32 thorpej * Public members.
109 1.32 thorpej */
110 1.59 thorpej struct lwp *ci_curlwp; /* current owner of the processor */
111 1.63 yamt struct cpu_data ci_data; /* MI per-cpu data */
112 1.75 he #ifndef _KMEMUSER
113 1.71 tsutsui struct cctr_state ci_cc; /* cycle counter state */
114 1.54 thorpej struct cpu_info *ci_next; /* next cpu_info structure */
115 1.66 ad int ci_mtx_count;
116 1.66 ad int ci_mtx_oldspl;
117 1.39 thorpej
118 1.32 thorpej /*
119 1.32 thorpej * Private members.
120 1.32 thorpej */
121 1.39 thorpej struct mchkinfo ci_mcinfo; /* machine check info */
122 1.39 thorpej cpuid_t ci_cpuid; /* our CPU ID */
123 1.43 thorpej struct cpu_softc *ci_softc; /* pointer to our device */
124 1.40 thorpej u_long ci_want_resched; /* preempt current process */
125 1.42 thorpej u_long ci_intrdepth; /* interrupt trap depth */
126 1.48 thorpej struct trapframe *ci_db_regs; /* registers for debuggers */
127 1.71 tsutsui uint64_t ci_pcc_freq; /* cpu cycles/second */
128 1.56 thorpej
129 1.40 thorpej #if defined(MULTIPROCESSOR)
130 1.65 perry volatile u_long ci_flags; /* flags; see below */
131 1.65 perry volatile u_long ci_ipis; /* interprocessor interrupts pending */
132 1.40 thorpej #endif
133 1.75 he #endif /* _KMEMUSER */
134 1.32 thorpej };
135 1.32 thorpej
136 1.75 he #endif /* _KERNEL || _KMEMUSER */
137 1.75 he
138 1.75 he #if defined(_KERNEL)
139 1.75 he
140 1.32 thorpej #define CPUF_PRIMARY 0x01 /* CPU is primary CPU */
141 1.32 thorpej #define CPUF_PRESENT 0x02 /* CPU is present */
142 1.32 thorpej #define CPUF_RUNNING 0x04 /* CPU is running */
143 1.48 thorpej #define CPUF_PAUSED 0x08 /* CPU is paused */
144 1.53 thorpej #define CPUF_FPUSAVE 0x10 /* CPU is currently in fpusave_cpu() */
145 1.32 thorpej
146 1.54 thorpej extern struct cpu_info cpu_info_primary;
147 1.54 thorpej extern struct cpu_info *cpu_info_list;
148 1.54 thorpej
149 1.54 thorpej #define CPU_INFO_ITERATOR int
150 1.54 thorpej #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \
151 1.54 thorpej ci != NULL; ci = ci->ci_next
152 1.54 thorpej
153 1.40 thorpej #if defined(MULTIPROCESSOR)
154 1.65 perry extern volatile u_long cpus_running;
155 1.65 perry extern volatile u_long cpus_paused;
156 1.54 thorpej extern struct cpu_info *cpu_info[];
157 1.32 thorpej
158 1.41 thorpej #define curcpu() ((struct cpu_info *)alpha_pal_rdval())
159 1.41 thorpej #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY)
160 1.32 thorpej
161 1.44 thorpej void cpu_boot_secondary_processors(void);
162 1.45 thorpej
163 1.45 thorpej void cpu_pause_resume(unsigned long, int);
164 1.45 thorpej void cpu_pause_resume_all(int);
165 1.39 thorpej #else /* ! MULTIPROCESSOR */
166 1.54 thorpej #define curcpu() (&cpu_info_primary)
167 1.32 thorpej #endif /* MULTIPROCESSOR */
168 1.38 thorpej
169 1.59 thorpej #define curlwp curcpu()->ci_curlwp
170 1.59 thorpej #define fpcurlwp curcpu()->ci_fpcurlwp
171 1.40 thorpej #define curpcb curcpu()->ci_curpcb
172 1.40 thorpej
173 1.1 cgd /*
174 1.1 cgd * definitions of cpu-dependent requirements
175 1.1 cgd * referenced in generic code
176 1.1 cgd */
177 1.31 thorpej #define cpu_number() alpha_pal_whami()
178 1.59 thorpej #define cpu_proc_fork(p1, p2) /* nothing */
179 1.1 cgd
180 1.1 cgd /*
181 1.1 cgd * Arguments to hardclock and gatherstats encapsulate the previous
182 1.1 cgd * machine state in an opaque clockframe. One the Alpha, we use
183 1.1 cgd * what we push on an interrupt (a trapframe).
184 1.1 cgd */
185 1.1 cgd struct clockframe {
186 1.1 cgd struct trapframe cf_tf;
187 1.1 cgd };
188 1.9 cgd #define CLKF_USERMODE(framep) \
189 1.11 cgd (((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
190 1.11 cgd #define CLKF_PC(framep) ((framep)->cf_tf.tf_regs[FRAME_PC])
191 1.42 thorpej
192 1.1 cgd /*
193 1.42 thorpej * This isn't perfect; if the clock interrupt comes in before the
194 1.42 thorpej * r/m/w cycle is complete, we won't be counted... but it's not
195 1.42 thorpej * like this stastic has to be extremely accurate.
196 1.1 cgd */
197 1.42 thorpej #define CLKF_INTR(framep) (curcpu()->ci_intrdepth)
198 1.49 mycroft
199 1.49 mycroft /*
200 1.49 mycroft * This is used during profiling to integrate system time. It can safely
201 1.49 mycroft * assume that the process is resident.
202 1.49 mycroft */
203 1.59 thorpej #define LWP_PC(p) ((l)->l_md.md_tf->tf_regs[FRAME_PC])
204 1.1 cgd
205 1.1 cgd /*
206 1.1 cgd * Give a profiling tick to the current process when the user profiling
207 1.40 thorpej * buffer pages are invalid. On the Alpha, request an AST to send us
208 1.1 cgd * through trap, marking the proc as needing a profiling tick.
209 1.1 cgd */
210 1.66 ad #define cpu_need_proftick(l) \
211 1.40 thorpej do { \
212 1.66 ad (l)->l_pflag |= LP_OWEUPC; \
213 1.66 ad aston(l); \
214 1.40 thorpej } while (/*CONSTCOND*/0)
215 1.1 cgd
216 1.1 cgd /*
217 1.1 cgd * Notify the current process (p) that it has a signal pending,
218 1.1 cgd * process as soon as possible.
219 1.1 cgd */
220 1.66 ad #define cpu_signotify(l) aston(l)
221 1.1 cgd
222 1.40 thorpej /*
223 1.40 thorpej * XXXSMP
224 1.40 thorpej * Should we send an AST IPI? Or just let it handle it next time
225 1.40 thorpej * it sees a normal kernel entry? I guess letting it happen later
226 1.40 thorpej * follows the `asynchronous' part of the name...
227 1.40 thorpej */
228 1.66 ad #define aston(l) ((l)->l_md.md_astpending = 1)
229 1.33 thorpej #endif /* _KERNEL */
230 1.1 cgd
231 1.1 cgd /*
232 1.1 cgd * CTL_MACHDEP definitions.
233 1.1 cgd */
234 1.1 cgd #define CPU_CONSDEV 1 /* dev_t: console terminal device */
235 1.8 cgd #define CPU_ROOT_DEVICE 2 /* string: root device name */
236 1.12 cgd #define CPU_UNALIGNED_PRINT 3 /* int: print unaligned accesses */
237 1.12 cgd #define CPU_UNALIGNED_FIX 4 /* int: fix unaligned accesses */
238 1.12 cgd #define CPU_UNALIGNED_SIGBUS 5 /* int: SIGBUS unaligned accesses */
239 1.14 cgd #define CPU_BOOTED_KERNEL 6 /* string: booted kernel name */
240 1.55 ross #define CPU_FP_SYNC_COMPLETE 7 /* int: always fixup sync fp traps */
241 1.55 ross #define CPU_MAXID 8 /* 7 valid machdep IDs */
242 1.1 cgd
243 1.13 cgd #ifdef _KERNEL
244 1.13 cgd
245 1.13 cgd struct pcb;
246 1.13 cgd struct proc;
247 1.13 cgd struct reg;
248 1.13 cgd struct rpb;
249 1.13 cgd struct trapframe;
250 1.57 sommerfe
251 1.44 thorpej int badaddr(void *, size_t);
252 1.13 cgd
253 1.68 yamt #define cpu_idle() /* nothing */
254 1.68 yamt
255 1.13 cgd #endif /* _KERNEL */
256 1.1 cgd #endif /* _ALPHA_CPU_H_ */
257