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cpu.h revision 1.52
      1 /* $NetBSD: cpu.h,v 1.52 2001/02/27 22:00:19 mjacob Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center, and by Charles M. Hannum.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1988 University of Utah.
     42  * Copyright (c) 1982, 1990, 1993
     43  *	The Regents of the University of California.  All rights reserved.
     44  *
     45  * This code is derived from software contributed to Berkeley by
     46  * the Systems Programming Group of the University of Utah Computer
     47  * Science Department.
     48  *
     49  * Redistribution and use in source and binary forms, with or without
     50  * modification, are permitted provided that the following conditions
     51  * are met:
     52  * 1. Redistributions of source code must retain the above copyright
     53  *    notice, this list of conditions and the following disclaimer.
     54  * 2. Redistributions in binary form must reproduce the above copyright
     55  *    notice, this list of conditions and the following disclaimer in the
     56  *    documentation and/or other materials provided with the distribution.
     57  * 3. All advertising materials mentioning features or use of this software
     58  *    must display the following acknowledgement:
     59  *	This product includes software developed by the University of
     60  *	California, Berkeley and its contributors.
     61  * 4. Neither the name of the University nor the names of its contributors
     62  *    may be used to endorse or promote products derived from this software
     63  *    without specific prior written permission.
     64  *
     65  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     66  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     67  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     68  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     69  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     70  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     71  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     72  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     73  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     74  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     75  * SUCH DAMAGE.
     76  *
     77  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     78  *
     79  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     80  */
     81 
     82 #ifndef _ALPHA_CPU_H_
     83 #define _ALPHA_CPU_H_
     84 
     85 #if defined(_KERNEL) && !defined(_LKM)
     86 #include "opt_multiprocessor.h"
     87 #include "opt_lockdebug.h"
     88 #endif
     89 
     90 /*
     91  * Exported definitions unique to Alpha cpu support.
     92  */
     93 
     94 #include <machine/alpha_cpu.h>
     95 
     96 #ifdef _KERNEL
     97 #include <sys/sched.h>
     98 #include <machine/frame.h>
     99 
    100 /*
    101  * Machine check information.
    102  */
    103 struct mchkinfo {
    104 	__volatile int mc_expected;	/* machine check is expected */
    105 	__volatile int mc_received;	/* machine check was received */
    106 };
    107 
    108 struct cpu_info {
    109 	/*
    110 	 * Public members.
    111 	 */
    112 	struct schedstate_percpu ci_schedstate; /* scheduler state */
    113 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
    114 	u_long ci_spin_locks;		/* # of spin locks held */
    115 	u_long ci_simple_locks;		/* # of simple locks held */
    116 #endif
    117 	struct proc *ci_curproc;	/* current owner of the processor */
    118 
    119 	/*
    120 	 * Private members.
    121 	 */
    122 	struct mchkinfo ci_mcinfo;	/* machine check info */
    123 	cpuid_t ci_cpuid;		/* our CPU ID */
    124 	struct proc *ci_fpcurproc;	/* current owner of the FPU */
    125 	paddr_t ci_curpcb;		/* PA of current HW PCB */
    126 	struct pcb *ci_idle_pcb;	/* our idle PCB */
    127 	paddr_t ci_idle_pcb_paddr;	/* PA of idle PCB */
    128 	struct cpu_softc *ci_softc;	/* pointer to our device */
    129 	u_long ci_want_resched;		/* preempt current process */
    130 	u_long ci_intrdepth;		/* interrupt trap depth */
    131 	struct trapframe *ci_db_regs;	/* registers for debuggers */
    132 #if defined(MULTIPROCESSOR)
    133 	__volatile u_long ci_flags;	/* flags; see below */
    134 	__volatile u_long ci_ipis;	/* interprocessor interrupts pending */
    135 #endif
    136 };
    137 
    138 #define	CPUF_PRIMARY	0x01		/* CPU is primary CPU */
    139 #define	CPUF_PRESENT	0x02		/* CPU is present */
    140 #define	CPUF_RUNNING	0x04		/* CPU is running */
    141 #define	CPUF_PAUSED	0x08		/* CPU is paused */
    142 
    143 #if defined(MULTIPROCESSOR)
    144 extern	__volatile u_long cpus_running;
    145 extern	__volatile u_long cpus_paused;
    146 extern	struct cpu_info cpu_info[];
    147 
    148 #define	curcpu()		((struct cpu_info *)alpha_pal_rdval())
    149 #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
    150 
    151 void	cpu_boot_secondary_processors(void);
    152 
    153 void	cpu_pause_resume(unsigned long, int);
    154 void	cpu_pause_resume_all(int);
    155 #else /* ! MULTIPROCESSOR */
    156 extern	struct cpu_info cpu_info_store;
    157 
    158 #define	curcpu()	(&cpu_info_store)
    159 #endif /* MULTIPROCESSOR */
    160 
    161 #define	curproc		curcpu()->ci_curproc
    162 #define	fpcurproc	curcpu()->ci_fpcurproc
    163 #define	curpcb		curcpu()->ci_curpcb
    164 
    165 extern	u_long cpu_implver;		/* from IMPLVER instruction */
    166 extern	u_long cpu_amask;		/* from AMASK instruction */
    167 
    168 /*
    169  * definitions of cpu-dependent requirements
    170  * referenced in generic code
    171  */
    172 #define	cpu_wait(p)		/* nothing */
    173 #define	cpu_number()		alpha_pal_whami()
    174 
    175 /*
    176  * Arguments to hardclock and gatherstats encapsulate the previous
    177  * machine state in an opaque clockframe.  One the Alpha, we use
    178  * what we push on an interrupt (a trapframe).
    179  */
    180 struct clockframe {
    181 	struct trapframe	cf_tf;
    182 };
    183 #define	CLKF_USERMODE(framep)						\
    184 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
    185 #define	CLKF_BASEPRI(framep)						\
    186 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_IPL_MASK) == 0)
    187 #define	CLKF_PC(framep)		((framep)->cf_tf.tf_regs[FRAME_PC])
    188 
    189 /*
    190  * This isn't perfect; if the clock interrupt comes in before the
    191  * r/m/w cycle is complete, we won't be counted... but it's not
    192  * like this stastic has to be extremely accurate.
    193  */
    194 #define	CLKF_INTR(framep)	(curcpu()->ci_intrdepth)
    195 
    196 /*
    197  * This is used during profiling to integrate system time.  It can safely
    198  * assume that the process is resident.
    199  */
    200 #define	PROC_PC(p)		((p)->p_md.md_tf->tf_regs[FRAME_PC])
    201 
    202 /*
    203  * Preempt the current process if in interrupt from user mode,
    204  * or after the current trap/syscall if in system mode.
    205  */
    206 #define	need_resched(ci)						\
    207 do {									\
    208 	(ci)->ci_want_resched = 1;					\
    209 	if ((ci)->ci_curproc != NULL)					\
    210 		aston((ci)->ci_curproc);				\
    211 } while (/*CONSTCOND*/0)
    212 
    213 /*
    214  * Give a profiling tick to the current process when the user profiling
    215  * buffer pages are invalid.  On the Alpha, request an AST to send us
    216  * through trap, marking the proc as needing a profiling tick.
    217  */
    218 #define	need_proftick(p)						\
    219 do {									\
    220 	(p)->p_flag |= P_OWEUPC;					\
    221 	aston(p);							\
    222 } while (/*CONSTCOND*/0)
    223 
    224 /*
    225  * Notify the current process (p) that it has a signal pending,
    226  * process as soon as possible.
    227  */
    228 #define	signotify(p)	aston(p)
    229 
    230 /*
    231  * XXXSMP
    232  * Should we send an AST IPI?  Or just let it handle it next time
    233  * it sees a normal kernel entry?  I guess letting it happen later
    234  * follows the `asynchronous' part of the name...
    235  */
    236 #define	aston(p)	((p)->p_md.md_astpending = 1)
    237 #endif /* _KERNEL */
    238 
    239 /*
    240  * CTL_MACHDEP definitions.
    241  */
    242 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    243 #define	CPU_ROOT_DEVICE		2	/* string: root device name */
    244 #define	CPU_UNALIGNED_PRINT	3	/* int: print unaligned accesses */
    245 #define	CPU_UNALIGNED_FIX	4	/* int: fix unaligned accesses */
    246 #define	CPU_UNALIGNED_SIGBUS	5	/* int: SIGBUS unaligned accesses */
    247 #define	CPU_BOOTED_KERNEL	6	/* string: booted kernel name */
    248 #define	CPU_MAXID		7	/* 6 valid machdep IDs */
    249 
    250 #define	CTL_MACHDEP_NAMES { \
    251 	{ 0, 0 }, \
    252 	{ "console_device", CTLTYPE_STRUCT }, \
    253 	{ "root_device", CTLTYPE_STRING }, \
    254 	{ "unaligned_print", CTLTYPE_INT }, \
    255 	{ "unaligned_fix", CTLTYPE_INT }, \
    256 	{ "unaligned_sigbus", CTLTYPE_INT }, \
    257 	{ "booted_kernel", CTLTYPE_STRING }, \
    258 }
    259 
    260 #ifdef _KERNEL
    261 
    262 struct pcb;
    263 struct proc;
    264 struct reg;
    265 struct rpb;
    266 struct trapframe;
    267 
    268 int	badaddr(void *, size_t);
    269 
    270 #endif /* _KERNEL */
    271 #endif /* _ALPHA_CPU_H_ */
    272