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cpu.h revision 1.63
      1 /* $NetBSD: cpu.h,v 1.63 2004/09/22 11:32:02 yamt Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center, and by Charles M. Hannum.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1982, 1990, 1993
     42  *	The Regents of the University of California.  All rights reserved.
     43  *
     44  * This code is derived from software contributed to Berkeley by
     45  * the Systems Programming Group of the University of Utah Computer
     46  * Science Department.
     47  *
     48  * Redistribution and use in source and binary forms, with or without
     49  * modification, are permitted provided that the following conditions
     50  * are met:
     51  * 1. Redistributions of source code must retain the above copyright
     52  *    notice, this list of conditions and the following disclaimer.
     53  * 2. Redistributions in binary form must reproduce the above copyright
     54  *    notice, this list of conditions and the following disclaimer in the
     55  *    documentation and/or other materials provided with the distribution.
     56  * 3. Neither the name of the University nor the names of its contributors
     57  *    may be used to endorse or promote products derived from this software
     58  *    without specific prior written permission.
     59  *
     60  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     61  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     62  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     63  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     64  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     65  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     66  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     67  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     68  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     69  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     70  * SUCH DAMAGE.
     71  *
     72  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     73  *
     74  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     75  */
     76 /*
     77  * Copyright (c) 1988 University of Utah.
     78  *
     79  * This code is derived from software contributed to Berkeley by
     80  * the Systems Programming Group of the University of Utah Computer
     81  * Science Department.
     82  *
     83  * Redistribution and use in source and binary forms, with or without
     84  * modification, are permitted provided that the following conditions
     85  * are met:
     86  * 1. Redistributions of source code must retain the above copyright
     87  *    notice, this list of conditions and the following disclaimer.
     88  * 2. Redistributions in binary form must reproduce the above copyright
     89  *    notice, this list of conditions and the following disclaimer in the
     90  *    documentation and/or other materials provided with the distribution.
     91  * 3. All advertising materials mentioning features or use of this software
     92  *    must display the following acknowledgement:
     93  *	This product includes software developed by the University of
     94  *	California, Berkeley and its contributors.
     95  * 4. Neither the name of the University nor the names of its contributors
     96  *    may be used to endorse or promote products derived from this software
     97  *    without specific prior written permission.
     98  *
     99  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
    100  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    101  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
    102  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
    103  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    104  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
    105  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    106  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    107  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    108  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    109  * SUCH DAMAGE.
    110  *
    111  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
    112  *
    113  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
    114  */
    115 
    116 #ifndef _ALPHA_CPU_H_
    117 #define _ALPHA_CPU_H_
    118 
    119 #if defined(_KERNEL_OPT)
    120 #include "opt_multiprocessor.h"
    121 #include "opt_lockdebug.h"
    122 #endif
    123 
    124 /*
    125  * Exported definitions unique to Alpha cpu support.
    126  */
    127 
    128 #include <machine/alpha_cpu.h>
    129 
    130 #ifdef _KERNEL
    131 #include <sys/cpu_data.h>
    132 #include <sys/cc_microtime.h>
    133 #include <machine/frame.h>
    134 
    135 /*
    136  * Machine check information.
    137  */
    138 struct mchkinfo {
    139 	__volatile int mc_expected;	/* machine check is expected */
    140 	__volatile int mc_received;	/* machine check was received */
    141 };
    142 
    143 struct cpu_info {
    144 	/*
    145 	 * Public members.
    146 	 */
    147 	struct lwp *ci_curlwp;		/* current owner of the processor */
    148 	struct cpu_data ci_data;	/* MI per-cpu data */
    149 	struct cc_microtime_state ci_cc;/* cc_microtime state */
    150 	struct cpu_info *ci_next;	/* next cpu_info structure */
    151 
    152 	/*
    153 	 * Private members.
    154 	 */
    155 	struct mchkinfo ci_mcinfo;	/* machine check info */
    156 	cpuid_t ci_cpuid;		/* our CPU ID */
    157 	struct lwp *ci_fpcurlwp;	/* current owner of the FPU */
    158 	paddr_t ci_curpcb;		/* PA of current HW PCB */
    159 	struct pcb *ci_idle_pcb;	/* our idle PCB */
    160 	paddr_t ci_idle_pcb_paddr;	/* PA of idle PCB */
    161 	struct cpu_softc *ci_softc;	/* pointer to our device */
    162 	u_long ci_want_resched;		/* preempt current process */
    163 	u_long ci_intrdepth;		/* interrupt trap depth */
    164 	struct trapframe *ci_db_regs;	/* registers for debuggers */
    165 
    166 #if defined(MULTIPROCESSOR)
    167 	__volatile u_long ci_flags;	/* flags; see below */
    168 	__volatile u_long ci_ipis;	/* interprocessor interrupts pending */
    169 #endif
    170 };
    171 
    172 #define	CPUF_PRIMARY	0x01		/* CPU is primary CPU */
    173 #define	CPUF_PRESENT	0x02		/* CPU is present */
    174 #define	CPUF_RUNNING	0x04		/* CPU is running */
    175 #define	CPUF_PAUSED	0x08		/* CPU is paused */
    176 #define	CPUF_FPUSAVE	0x10		/* CPU is currently in fpusave_cpu() */
    177 
    178 extern	struct cpu_info cpu_info_primary;
    179 extern	struct cpu_info *cpu_info_list;
    180 
    181 #define	CPU_INFO_ITERATOR		int
    182 #define	CPU_INFO_FOREACH(cii, ci)	cii = 0, ci = cpu_info_list; \
    183 					ci != NULL; ci = ci->ci_next
    184 
    185 #if defined(MULTIPROCESSOR)
    186 extern	__volatile u_long cpus_running;
    187 extern	__volatile u_long cpus_paused;
    188 extern	struct cpu_info *cpu_info[];
    189 
    190 #define	curcpu()		((struct cpu_info *)alpha_pal_rdval())
    191 #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
    192 
    193 void	cpu_boot_secondary_processors(void);
    194 
    195 void	cpu_pause_resume(unsigned long, int);
    196 void	cpu_pause_resume_all(int);
    197 #else /* ! MULTIPROCESSOR */
    198 #define	curcpu()	(&cpu_info_primary)
    199 #endif /* MULTIPROCESSOR */
    200 
    201 #define	curlwp		curcpu()->ci_curlwp
    202 #define	fpcurlwp	curcpu()->ci_fpcurlwp
    203 #define	curpcb		curcpu()->ci_curpcb
    204 
    205 /*
    206  * definitions of cpu-dependent requirements
    207  * referenced in generic code
    208  */
    209 #define	cpu_number()		alpha_pal_whami()
    210 #define	cpu_proc_fork(p1, p2)	/* nothing */
    211 
    212 /*
    213  * Arguments to hardclock and gatherstats encapsulate the previous
    214  * machine state in an opaque clockframe.  One the Alpha, we use
    215  * what we push on an interrupt (a trapframe).
    216  */
    217 struct clockframe {
    218 	struct trapframe	cf_tf;
    219 };
    220 #define	CLKF_USERMODE(framep)						\
    221 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
    222 #define	CLKF_BASEPRI(framep)						\
    223 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_IPL_MASK) == 0)
    224 #define	CLKF_PC(framep)		((framep)->cf_tf.tf_regs[FRAME_PC])
    225 
    226 /*
    227  * This isn't perfect; if the clock interrupt comes in before the
    228  * r/m/w cycle is complete, we won't be counted... but it's not
    229  * like this stastic has to be extremely accurate.
    230  */
    231 #define	CLKF_INTR(framep)	(curcpu()->ci_intrdepth)
    232 
    233 /*
    234  * This is used during profiling to integrate system time.  It can safely
    235  * assume that the process is resident.
    236  */
    237 #define	LWP_PC(p)		((l)->l_md.md_tf->tf_regs[FRAME_PC])
    238 
    239 /*
    240  * Preempt the current process if in interrupt from user mode,
    241  * or after the current trap/syscall if in system mode.
    242  */
    243 #define	need_resched(ci)						\
    244 do {									\
    245 	(ci)->ci_want_resched = 1;					\
    246 	if ((ci)->ci_curlwp != NULL)					\
    247 		aston((ci)->ci_curlwp->l_proc);       			\
    248 } while (/*CONSTCOND*/0)
    249 
    250 /*
    251  * Give a profiling tick to the current process when the user profiling
    252  * buffer pages are invalid.  On the Alpha, request an AST to send us
    253  * through trap, marking the proc as needing a profiling tick.
    254  */
    255 #define	need_proftick(p)						\
    256 do {									\
    257 	(p)->p_flag |= P_OWEUPC;					\
    258 	aston(p);							\
    259 } while (/*CONSTCOND*/0)
    260 
    261 /*
    262  * Notify the current process (p) that it has a signal pending,
    263  * process as soon as possible.
    264  */
    265 #define	signotify(p)	aston(p)
    266 
    267 /*
    268  * XXXSMP
    269  * Should we send an AST IPI?  Or just let it handle it next time
    270  * it sees a normal kernel entry?  I guess letting it happen later
    271  * follows the `asynchronous' part of the name...
    272  */
    273 #define	aston(p)	((p)->p_md.md_astpending = 1)
    274 #endif /* _KERNEL */
    275 
    276 /*
    277  * CTL_MACHDEP definitions.
    278  */
    279 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    280 #define	CPU_ROOT_DEVICE		2	/* string: root device name */
    281 #define	CPU_UNALIGNED_PRINT	3	/* int: print unaligned accesses */
    282 #define	CPU_UNALIGNED_FIX	4	/* int: fix unaligned accesses */
    283 #define	CPU_UNALIGNED_SIGBUS	5	/* int: SIGBUS unaligned accesses */
    284 #define	CPU_BOOTED_KERNEL	6	/* string: booted kernel name */
    285 #define	CPU_FP_SYNC_COMPLETE	7	/* int: always fixup sync fp traps */
    286 #define	CPU_MAXID		8	/* 7 valid machdep IDs */
    287 
    288 #define	CTL_MACHDEP_NAMES { \
    289 	{ 0, 0 }, \
    290 	{ "console_device", CTLTYPE_STRUCT }, \
    291 	{ "root_device", CTLTYPE_STRING }, \
    292 	{ "unaligned_print", CTLTYPE_INT }, \
    293 	{ "unaligned_fix", CTLTYPE_INT }, \
    294 	{ "unaligned_sigbus", CTLTYPE_INT }, \
    295 	{ "booted_kernel", CTLTYPE_STRING }, \
    296 	{ "fp_sync_complete", CTLTYPE_INT }, \
    297 }
    298 
    299 #ifdef _KERNEL
    300 
    301 struct pcb;
    302 struct proc;
    303 struct reg;
    304 struct rpb;
    305 struct trapframe;
    306 
    307 int	badaddr(void *, size_t);
    308 #define microtime(tv)	cc_microtime(tv)
    309 
    310 #endif /* _KERNEL */
    311 #endif /* _ALPHA_CPU_H_ */
    312