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cpu.h revision 1.72
      1 /* $NetBSD: cpu.h,v 1.72 2007/10/17 19:52:58 garbled Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center, and by Charles M. Hannum.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1982, 1990, 1993
     42  *	The Regents of the University of California.  All rights reserved.
     43  *
     44  * This code is derived from software contributed to Berkeley by
     45  * the Systems Programming Group of the University of Utah Computer
     46  * Science Department.
     47  *
     48  * Redistribution and use in source and binary forms, with or without
     49  * modification, are permitted provided that the following conditions
     50  * are met:
     51  * 1. Redistributions of source code must retain the above copyright
     52  *    notice, this list of conditions and the following disclaimer.
     53  * 2. Redistributions in binary form must reproduce the above copyright
     54  *    notice, this list of conditions and the following disclaimer in the
     55  *    documentation and/or other materials provided with the distribution.
     56  * 3. Neither the name of the University nor the names of its contributors
     57  *    may be used to endorse or promote products derived from this software
     58  *    without specific prior written permission.
     59  *
     60  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     61  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     62  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     63  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     64  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     65  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     66  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     67  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     68  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     69  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     70  * SUCH DAMAGE.
     71  *
     72  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     73  *
     74  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     75  */
     76 /*
     77  * Copyright (c) 1988 University of Utah.
     78  *
     79  * This code is derived from software contributed to Berkeley by
     80  * the Systems Programming Group of the University of Utah Computer
     81  * Science Department.
     82  *
     83  * Redistribution and use in source and binary forms, with or without
     84  * modification, are permitted provided that the following conditions
     85  * are met:
     86  * 1. Redistributions of source code must retain the above copyright
     87  *    notice, this list of conditions and the following disclaimer.
     88  * 2. Redistributions in binary form must reproduce the above copyright
     89  *    notice, this list of conditions and the following disclaimer in the
     90  *    documentation and/or other materials provided with the distribution.
     91  * 3. All advertising materials mentioning features or use of this software
     92  *    must display the following acknowledgement:
     93  *	This product includes software developed by the University of
     94  *	California, Berkeley and its contributors.
     95  * 4. Neither the name of the University nor the names of its contributors
     96  *    may be used to endorse or promote products derived from this software
     97  *    without specific prior written permission.
     98  *
     99  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
    100  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    101  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
    102  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
    103  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    104  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
    105  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    106  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    107  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    108  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    109  * SUCH DAMAGE.
    110  *
    111  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
    112  *
    113  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
    114  */
    115 
    116 #ifndef _ALPHA_CPU_H_
    117 #define _ALPHA_CPU_H_
    118 
    119 #if defined(_KERNEL_OPT)
    120 #include "opt_multiprocessor.h"
    121 #include "opt_lockdebug.h"
    122 #endif
    123 
    124 /*
    125  * Exported definitions unique to Alpha cpu support.
    126  */
    127 
    128 #include <machine/alpha_cpu.h>
    129 
    130 #ifdef _KERNEL
    131 #include <sys/cpu_data.h>
    132 #include <sys/cctr.h>
    133 #include <machine/frame.h>
    134 
    135 /*
    136  * Machine check information.
    137  */
    138 struct mchkinfo {
    139 	volatile int mc_expected;	/* machine check is expected */
    140 	volatile int mc_received;	/* machine check was received */
    141 };
    142 
    143 struct cpu_info {
    144 	/*
    145 	 * Private members accessed in assembly with 8 bit offsets.
    146 	 */
    147 	struct lwp *ci_fpcurlwp;	/* current owner of the FPU */
    148 	paddr_t ci_curpcb;		/* PA of current HW PCB */
    149 
    150 	/*
    151 	 * Public members.
    152 	 */
    153 	struct lwp *ci_curlwp;		/* current owner of the processor */
    154 	struct cpu_data ci_data;	/* MI per-cpu data */
    155 	struct cctr_state ci_cc;	/* cycle counter state */
    156 	struct cpu_info *ci_next;	/* next cpu_info structure */
    157 	int ci_mtx_count;
    158 	int ci_mtx_oldspl;
    159 
    160 	/*
    161 	 * Private members.
    162 	 */
    163 	struct mchkinfo ci_mcinfo;	/* machine check info */
    164 	cpuid_t ci_cpuid;		/* our CPU ID */
    165 	struct cpu_softc *ci_softc;	/* pointer to our device */
    166 	u_long ci_want_resched;		/* preempt current process */
    167 	u_long ci_intrdepth;		/* interrupt trap depth */
    168 	struct trapframe *ci_db_regs;	/* registers for debuggers */
    169 	uint64_t ci_pcc_freq;		/* cpu cycles/second */
    170 
    171 #if defined(MULTIPROCESSOR)
    172 	volatile u_long ci_flags;	/* flags; see below */
    173 	volatile u_long ci_ipis;	/* interprocessor interrupts pending */
    174 #endif
    175 };
    176 
    177 #define	CPUF_PRIMARY	0x01		/* CPU is primary CPU */
    178 #define	CPUF_PRESENT	0x02		/* CPU is present */
    179 #define	CPUF_RUNNING	0x04		/* CPU is running */
    180 #define	CPUF_PAUSED	0x08		/* CPU is paused */
    181 #define	CPUF_FPUSAVE	0x10		/* CPU is currently in fpusave_cpu() */
    182 
    183 extern	struct cpu_info cpu_info_primary;
    184 extern	struct cpu_info *cpu_info_list;
    185 
    186 #define	CPU_INFO_ITERATOR		int
    187 #define	CPU_INFO_FOREACH(cii, ci)	cii = 0, ci = cpu_info_list; \
    188 					ci != NULL; ci = ci->ci_next
    189 
    190 #if defined(MULTIPROCESSOR)
    191 extern	volatile u_long cpus_running;
    192 extern	volatile u_long cpus_paused;
    193 extern	struct cpu_info *cpu_info[];
    194 
    195 #define	curcpu()		((struct cpu_info *)alpha_pal_rdval())
    196 #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
    197 
    198 void	cpu_boot_secondary_processors(void);
    199 
    200 void	cpu_pause_resume(unsigned long, int);
    201 void	cpu_pause_resume_all(int);
    202 #else /* ! MULTIPROCESSOR */
    203 #define	curcpu()	(&cpu_info_primary)
    204 #endif /* MULTIPROCESSOR */
    205 
    206 #define	curlwp		curcpu()->ci_curlwp
    207 #define	fpcurlwp	curcpu()->ci_fpcurlwp
    208 #define	curpcb		curcpu()->ci_curpcb
    209 
    210 /*
    211  * definitions of cpu-dependent requirements
    212  * referenced in generic code
    213  */
    214 #define	cpu_number()		alpha_pal_whami()
    215 #define	cpu_proc_fork(p1, p2)	/* nothing */
    216 
    217 /*
    218  * Arguments to hardclock and gatherstats encapsulate the previous
    219  * machine state in an opaque clockframe.  One the Alpha, we use
    220  * what we push on an interrupt (a trapframe).
    221  */
    222 struct clockframe {
    223 	struct trapframe	cf_tf;
    224 };
    225 #define	CLKF_USERMODE(framep)						\
    226 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
    227 #define	CLKF_PC(framep)		((framep)->cf_tf.tf_regs[FRAME_PC])
    228 
    229 /*
    230  * This isn't perfect; if the clock interrupt comes in before the
    231  * r/m/w cycle is complete, we won't be counted... but it's not
    232  * like this stastic has to be extremely accurate.
    233  */
    234 #define	CLKF_INTR(framep)	(curcpu()->ci_intrdepth)
    235 
    236 /*
    237  * This is used during profiling to integrate system time.  It can safely
    238  * assume that the process is resident.
    239  */
    240 #define	LWP_PC(p)		((l)->l_md.md_tf->tf_regs[FRAME_PC])
    241 
    242 /*
    243  * Give a profiling tick to the current process when the user profiling
    244  * buffer pages are invalid.  On the Alpha, request an AST to send us
    245  * through trap, marking the proc as needing a profiling tick.
    246  */
    247 #define	cpu_need_proftick(l)						\
    248 do {									\
    249 	(l)->l_pflag |= LP_OWEUPC;					\
    250 	aston(l);							\
    251 } while (/*CONSTCOND*/0)
    252 
    253 /*
    254  * Notify the current process (p) that it has a signal pending,
    255  * process as soon as possible.
    256  */
    257 #define	cpu_signotify(l)	aston(l)
    258 
    259 /*
    260  * XXXSMP
    261  * Should we send an AST IPI?  Or just let it handle it next time
    262  * it sees a normal kernel entry?  I guess letting it happen later
    263  * follows the `asynchronous' part of the name...
    264  */
    265 #define	aston(l)	((l)->l_md.md_astpending = 1)
    266 #endif /* _KERNEL */
    267 
    268 /*
    269  * CTL_MACHDEP definitions.
    270  */
    271 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    272 #define	CPU_ROOT_DEVICE		2	/* string: root device name */
    273 #define	CPU_UNALIGNED_PRINT	3	/* int: print unaligned accesses */
    274 #define	CPU_UNALIGNED_FIX	4	/* int: fix unaligned accesses */
    275 #define	CPU_UNALIGNED_SIGBUS	5	/* int: SIGBUS unaligned accesses */
    276 #define	CPU_BOOTED_KERNEL	6	/* string: booted kernel name */
    277 #define	CPU_FP_SYNC_COMPLETE	7	/* int: always fixup sync fp traps */
    278 #define	CPU_MAXID		8	/* 7 valid machdep IDs */
    279 
    280 #define	CTL_MACHDEP_NAMES { \
    281 	{ 0, 0 }, \
    282 	{ "console_device", CTLTYPE_STRUCT }, \
    283 	{ "root_device", CTLTYPE_STRING }, \
    284 	{ "unaligned_print", CTLTYPE_INT }, \
    285 	{ "unaligned_fix", CTLTYPE_INT }, \
    286 	{ "unaligned_sigbus", CTLTYPE_INT }, \
    287 	{ "booted_kernel", CTLTYPE_STRING }, \
    288 	{ "fp_sync_complete", CTLTYPE_INT }, \
    289 }
    290 
    291 #ifdef _KERNEL
    292 
    293 struct pcb;
    294 struct proc;
    295 struct reg;
    296 struct rpb;
    297 struct trapframe;
    298 
    299 int	badaddr(void *, size_t);
    300 
    301 #define	cpu_idle()	/* nothing */
    302 
    303 #endif /* _KERNEL */
    304 #endif /* _ALPHA_CPU_H_ */
    305