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cpu.h revision 1.72.16.2
      1 /* $NetBSD: cpu.h,v 1.72.16.2 2008/06/02 13:21:46 mjf Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center, and by Charles M. Hannum.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Copyright (c) 1982, 1990, 1993
     35  *	The Regents of the University of California.  All rights reserved.
     36  *
     37  * This code is derived from software contributed to Berkeley by
     38  * the Systems Programming Group of the University of Utah Computer
     39  * Science Department.
     40  *
     41  * Redistribution and use in source and binary forms, with or without
     42  * modification, are permitted provided that the following conditions
     43  * are met:
     44  * 1. Redistributions of source code must retain the above copyright
     45  *    notice, this list of conditions and the following disclaimer.
     46  * 2. Redistributions in binary form must reproduce the above copyright
     47  *    notice, this list of conditions and the following disclaimer in the
     48  *    documentation and/or other materials provided with the distribution.
     49  * 3. Neither the name of the University nor the names of its contributors
     50  *    may be used to endorse or promote products derived from this software
     51  *    without specific prior written permission.
     52  *
     53  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     54  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     55  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     56  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     57  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     58  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     59  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     60  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     61  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     62  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     63  * SUCH DAMAGE.
     64  *
     65  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     66  *
     67  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     68  */
     69 /*
     70  * Copyright (c) 1988 University of Utah.
     71  *
     72  * This code is derived from software contributed to Berkeley by
     73  * the Systems Programming Group of the University of Utah Computer
     74  * Science Department.
     75  *
     76  * Redistribution and use in source and binary forms, with or without
     77  * modification, are permitted provided that the following conditions
     78  * are met:
     79  * 1. Redistributions of source code must retain the above copyright
     80  *    notice, this list of conditions and the following disclaimer.
     81  * 2. Redistributions in binary form must reproduce the above copyright
     82  *    notice, this list of conditions and the following disclaimer in the
     83  *    documentation and/or other materials provided with the distribution.
     84  * 3. All advertising materials mentioning features or use of this software
     85  *    must display the following acknowledgement:
     86  *	This product includes software developed by the University of
     87  *	California, Berkeley and its contributors.
     88  * 4. Neither the name of the University nor the names of its contributors
     89  *    may be used to endorse or promote products derived from this software
     90  *    without specific prior written permission.
     91  *
     92  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     93  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     94  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     95  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     96  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     97  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     98  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     99  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    100  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    101  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    102  * SUCH DAMAGE.
    103  *
    104  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
    105  *
    106  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
    107  */
    108 
    109 #ifndef _ALPHA_CPU_H_
    110 #define _ALPHA_CPU_H_
    111 
    112 #if defined(_KERNEL_OPT)
    113 #include "opt_multiprocessor.h"
    114 #include "opt_lockdebug.h"
    115 #endif
    116 
    117 /*
    118  * Exported definitions unique to Alpha cpu support.
    119  */
    120 
    121 #include <machine/alpha_cpu.h>
    122 
    123 #ifdef _KERNEL
    124 #include <sys/cpu_data.h>
    125 #include <sys/cctr.h>
    126 #include <machine/frame.h>
    127 
    128 /*
    129  * Machine check information.
    130  */
    131 struct mchkinfo {
    132 	volatile int mc_expected;	/* machine check is expected */
    133 	volatile int mc_received;	/* machine check was received */
    134 };
    135 
    136 struct cpu_info {
    137 	/*
    138 	 * Private members accessed in assembly with 8 bit offsets.
    139 	 */
    140 	struct lwp *ci_fpcurlwp;	/* current owner of the FPU */
    141 	paddr_t ci_curpcb;		/* PA of current HW PCB */
    142 
    143 	/*
    144 	 * Public members.
    145 	 */
    146 	struct lwp *ci_curlwp;		/* current owner of the processor */
    147 	struct cpu_data ci_data;	/* MI per-cpu data */
    148 	struct cctr_state ci_cc;	/* cycle counter state */
    149 	struct cpu_info *ci_next;	/* next cpu_info structure */
    150 	int ci_mtx_count;
    151 	int ci_mtx_oldspl;
    152 
    153 	/*
    154 	 * Private members.
    155 	 */
    156 	struct mchkinfo ci_mcinfo;	/* machine check info */
    157 	cpuid_t ci_cpuid;		/* our CPU ID */
    158 	struct cpu_softc *ci_softc;	/* pointer to our device */
    159 	u_long ci_want_resched;		/* preempt current process */
    160 	u_long ci_intrdepth;		/* interrupt trap depth */
    161 	struct trapframe *ci_db_regs;	/* registers for debuggers */
    162 	uint64_t ci_pcc_freq;		/* cpu cycles/second */
    163 
    164 #if defined(MULTIPROCESSOR)
    165 	volatile u_long ci_flags;	/* flags; see below */
    166 	volatile u_long ci_ipis;	/* interprocessor interrupts pending */
    167 #endif
    168 };
    169 
    170 #define	CPUF_PRIMARY	0x01		/* CPU is primary CPU */
    171 #define	CPUF_PRESENT	0x02		/* CPU is present */
    172 #define	CPUF_RUNNING	0x04		/* CPU is running */
    173 #define	CPUF_PAUSED	0x08		/* CPU is paused */
    174 #define	CPUF_FPUSAVE	0x10		/* CPU is currently in fpusave_cpu() */
    175 
    176 extern	struct cpu_info cpu_info_primary;
    177 extern	struct cpu_info *cpu_info_list;
    178 
    179 #define	CPU_INFO_ITERATOR		int
    180 #define	CPU_INFO_FOREACH(cii, ci)	cii = 0, ci = cpu_info_list; \
    181 					ci != NULL; ci = ci->ci_next
    182 
    183 #if defined(MULTIPROCESSOR)
    184 extern	volatile u_long cpus_running;
    185 extern	volatile u_long cpus_paused;
    186 extern	struct cpu_info *cpu_info[];
    187 
    188 #define	curcpu()		((struct cpu_info *)alpha_pal_rdval())
    189 #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
    190 
    191 void	cpu_boot_secondary_processors(void);
    192 
    193 void	cpu_pause_resume(unsigned long, int);
    194 void	cpu_pause_resume_all(int);
    195 #else /* ! MULTIPROCESSOR */
    196 #define	curcpu()	(&cpu_info_primary)
    197 #endif /* MULTIPROCESSOR */
    198 
    199 #define	curlwp		curcpu()->ci_curlwp
    200 #define	fpcurlwp	curcpu()->ci_fpcurlwp
    201 #define	curpcb		curcpu()->ci_curpcb
    202 
    203 /*
    204  * definitions of cpu-dependent requirements
    205  * referenced in generic code
    206  */
    207 #define	cpu_number()		alpha_pal_whami()
    208 #define	cpu_proc_fork(p1, p2)	/* nothing */
    209 
    210 /*
    211  * Arguments to hardclock and gatherstats encapsulate the previous
    212  * machine state in an opaque clockframe.  One the Alpha, we use
    213  * what we push on an interrupt (a trapframe).
    214  */
    215 struct clockframe {
    216 	struct trapframe	cf_tf;
    217 };
    218 #define	CLKF_USERMODE(framep)						\
    219 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
    220 #define	CLKF_PC(framep)		((framep)->cf_tf.tf_regs[FRAME_PC])
    221 
    222 /*
    223  * This isn't perfect; if the clock interrupt comes in before the
    224  * r/m/w cycle is complete, we won't be counted... but it's not
    225  * like this stastic has to be extremely accurate.
    226  */
    227 #define	CLKF_INTR(framep)	(curcpu()->ci_intrdepth)
    228 
    229 /*
    230  * This is used during profiling to integrate system time.  It can safely
    231  * assume that the process is resident.
    232  */
    233 #define	LWP_PC(p)		((l)->l_md.md_tf->tf_regs[FRAME_PC])
    234 
    235 /*
    236  * Give a profiling tick to the current process when the user profiling
    237  * buffer pages are invalid.  On the Alpha, request an AST to send us
    238  * through trap, marking the proc as needing a profiling tick.
    239  */
    240 #define	cpu_need_proftick(l)						\
    241 do {									\
    242 	(l)->l_pflag |= LP_OWEUPC;					\
    243 	aston(l);							\
    244 } while (/*CONSTCOND*/0)
    245 
    246 /*
    247  * Notify the current process (p) that it has a signal pending,
    248  * process as soon as possible.
    249  */
    250 #define	cpu_signotify(l)	aston(l)
    251 
    252 /*
    253  * XXXSMP
    254  * Should we send an AST IPI?  Or just let it handle it next time
    255  * it sees a normal kernel entry?  I guess letting it happen later
    256  * follows the `asynchronous' part of the name...
    257  */
    258 #define	aston(l)	((l)->l_md.md_astpending = 1)
    259 #endif /* _KERNEL */
    260 
    261 /*
    262  * CTL_MACHDEP definitions.
    263  */
    264 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    265 #define	CPU_ROOT_DEVICE		2	/* string: root device name */
    266 #define	CPU_UNALIGNED_PRINT	3	/* int: print unaligned accesses */
    267 #define	CPU_UNALIGNED_FIX	4	/* int: fix unaligned accesses */
    268 #define	CPU_UNALIGNED_SIGBUS	5	/* int: SIGBUS unaligned accesses */
    269 #define	CPU_BOOTED_KERNEL	6	/* string: booted kernel name */
    270 #define	CPU_FP_SYNC_COMPLETE	7	/* int: always fixup sync fp traps */
    271 #define	CPU_MAXID		8	/* 7 valid machdep IDs */
    272 
    273 #ifdef _KERNEL
    274 
    275 struct pcb;
    276 struct proc;
    277 struct reg;
    278 struct rpb;
    279 struct trapframe;
    280 
    281 int	badaddr(void *, size_t);
    282 
    283 #define	cpu_idle()	/* nothing */
    284 
    285 #endif /* _KERNEL */
    286 #endif /* _ALPHA_CPU_H_ */
    287