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cpu.h revision 1.75.4.1
      1 /* $NetBSD: cpu.h,v 1.75.4.1 2011/02/17 11:59:29 bouyer Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center, and by Charles M. Hannum.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Copyright (c) 1988 University of Utah.
     35  * Copyright (c) 1982, 1990, 1993
     36  *	The Regents of the University of California.  All rights reserved.
     37  *
     38  * This code is derived from software contributed to Berkeley by
     39  * the Systems Programming Group of the University of Utah Computer
     40  * Science Department.
     41  *
     42  * Redistribution and use in source and binary forms, with or without
     43  * modification, are permitted provided that the following conditions
     44  * are met:
     45  * 1. Redistributions of source code must retain the above copyright
     46  *    notice, this list of conditions and the following disclaimer.
     47  * 2. Redistributions in binary form must reproduce the above copyright
     48  *    notice, this list of conditions and the following disclaimer in the
     49  *    documentation and/or other materials provided with the distribution.
     50  * 3. Neither the name of the University nor the names of its contributors
     51  *    may be used to endorse or promote products derived from this software
     52  *    without specific prior written permission.
     53  *
     54  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     55  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     56  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     57  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     58  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     59  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     60  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     61  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     62  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     63  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     64  * SUCH DAMAGE.
     65  *
     66  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     67  *
     68  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     69  */
     70 
     71 #ifndef _ALPHA_CPU_H_
     72 #define _ALPHA_CPU_H_
     73 
     74 #if defined(_KERNEL_OPT)
     75 #include "opt_multiprocessor.h"
     76 #include "opt_lockdebug.h"
     77 #endif
     78 
     79 /*
     80  * Exported definitions unique to Alpha cpu support.
     81  */
     82 
     83 #include <machine/alpha_cpu.h>
     84 
     85 #if defined(_KERNEL) || defined(_KMEMUSER)
     86 #include <sys/cpu_data.h>
     87 #ifndef _KMEMUSER
     88 #include <sys/cctr.h>
     89 #include <machine/frame.h>
     90 #endif
     91 
     92 /*
     93  * Machine check information.
     94  */
     95 struct mchkinfo {
     96 	volatile int mc_expected;	/* machine check is expected */
     97 	volatile int mc_received;	/* machine check was received */
     98 };
     99 
    100 struct cpu_info {
    101 	/*
    102 	 * Private members accessed in assembly with 8 bit offsets.
    103 	 */
    104 	struct lwp *ci_fpcurlwp;	/* current owner of the FPU */
    105 	paddr_t ci_curpcb;		/* PA of current HW PCB */
    106 
    107 	/*
    108 	 * Public members.
    109 	 */
    110 	struct lwp *ci_curlwp;		/* current owner of the processor */
    111 	struct cpu_data ci_data;	/* MI per-cpu data */
    112 #ifndef _KMEMUSER
    113 	struct cctr_state ci_cc;	/* cycle counter state */
    114 	struct cpu_info *ci_next;	/* next cpu_info structure */
    115 	int ci_mtx_count;
    116 	int ci_mtx_oldspl;
    117 
    118 	/*
    119 	 * Private members.
    120 	 */
    121 	struct mchkinfo ci_mcinfo;	/* machine check info */
    122 	cpuid_t ci_cpuid;		/* our CPU ID */
    123 	struct cpu_softc *ci_softc;	/* pointer to our device */
    124 	u_long ci_want_resched;		/* preempt current process */
    125 	u_long ci_intrdepth;		/* interrupt trap depth */
    126 	struct trapframe *ci_db_regs;	/* registers for debuggers */
    127 	uint64_t ci_pcc_freq;		/* cpu cycles/second */
    128 
    129 #if defined(MULTIPROCESSOR)
    130 	volatile u_long ci_flags;	/* flags; see below */
    131 	volatile u_long ci_ipis;	/* interprocessor interrupts pending */
    132 #endif
    133 #endif /* _KMEMUSER */
    134 };
    135 
    136 #endif /* _KERNEL || _KMEMUSER */
    137 
    138 #if defined(_KERNEL)
    139 
    140 #define	CPUF_PRIMARY	0x01		/* CPU is primary CPU */
    141 #define	CPUF_PRESENT	0x02		/* CPU is present */
    142 #define	CPUF_RUNNING	0x04		/* CPU is running */
    143 #define	CPUF_PAUSED	0x08		/* CPU is paused */
    144 #define	CPUF_FPUSAVE	0x10		/* CPU is currently in fpusave_cpu() */
    145 
    146 extern	struct cpu_info cpu_info_primary;
    147 extern	struct cpu_info *cpu_info_list;
    148 
    149 #define	CPU_INFO_ITERATOR		int
    150 #define	CPU_INFO_FOREACH(cii, ci)	cii = 0, ci = cpu_info_list; \
    151 					ci != NULL; ci = ci->ci_next
    152 
    153 #if defined(MULTIPROCESSOR)
    154 extern	volatile u_long cpus_running;
    155 extern	volatile u_long cpus_paused;
    156 extern	struct cpu_info *cpu_info[];
    157 
    158 #define	curcpu()		((struct cpu_info *)alpha_pal_rdval())
    159 #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
    160 
    161 void	cpu_boot_secondary_processors(void);
    162 
    163 void	cpu_pause_resume(unsigned long, int);
    164 void	cpu_pause_resume_all(int);
    165 #else /* ! MULTIPROCESSOR */
    166 #define	curcpu()	(&cpu_info_primary)
    167 #endif /* MULTIPROCESSOR */
    168 
    169 #define	curlwp		curcpu()->ci_curlwp
    170 #define	fpcurlwp	curcpu()->ci_fpcurlwp
    171 #define	curpcb		curcpu()->ci_curpcb
    172 
    173 /*
    174  * definitions of cpu-dependent requirements
    175  * referenced in generic code
    176  */
    177 #define	cpu_number()		alpha_pal_whami()
    178 #define	cpu_proc_fork(p1, p2)	/* nothing */
    179 
    180 /*
    181  * Arguments to hardclock and gatherstats encapsulate the previous
    182  * machine state in an opaque clockframe.  One the Alpha, we use
    183  * what we push on an interrupt (a trapframe).
    184  */
    185 struct clockframe {
    186 	struct trapframe	cf_tf;
    187 };
    188 #define	CLKF_USERMODE(framep)						\
    189 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
    190 #define	CLKF_PC(framep)		((framep)->cf_tf.tf_regs[FRAME_PC])
    191 
    192 /*
    193  * This isn't perfect; if the clock interrupt comes in before the
    194  * r/m/w cycle is complete, we won't be counted... but it's not
    195  * like this stastic has to be extremely accurate.
    196  */
    197 #define	CLKF_INTR(framep)	(curcpu()->ci_intrdepth)
    198 
    199 /*
    200  * This is used during profiling to integrate system time.  It can safely
    201  * assume that the process is resident.
    202  */
    203 #define	LWP_PC(p)		((l)->l_md.md_tf->tf_regs[FRAME_PC])
    204 
    205 /*
    206  * Give a profiling tick to the current process when the user profiling
    207  * buffer pages are invalid.  On the Alpha, request an AST to send us
    208  * through trap, marking the proc as needing a profiling tick.
    209  */
    210 #define	cpu_need_proftick(l)						\
    211 do {									\
    212 	(l)->l_pflag |= LP_OWEUPC;					\
    213 	aston(l);							\
    214 } while (/*CONSTCOND*/0)
    215 
    216 /*
    217  * Notify the current process (p) that it has a signal pending,
    218  * process as soon as possible.
    219  */
    220 #define	cpu_signotify(l)	aston(l)
    221 
    222 /*
    223  * XXXSMP
    224  * Should we send an AST IPI?  Or just let it handle it next time
    225  * it sees a normal kernel entry?  I guess letting it happen later
    226  * follows the `asynchronous' part of the name...
    227  */
    228 #define	aston(l)	((l)->l_md.md_astpending = 1)
    229 #endif /* _KERNEL */
    230 
    231 /*
    232  * CTL_MACHDEP definitions.
    233  */
    234 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    235 #define	CPU_ROOT_DEVICE		2	/* string: root device name */
    236 #define	CPU_UNALIGNED_PRINT	3	/* int: print unaligned accesses */
    237 #define	CPU_UNALIGNED_FIX	4	/* int: fix unaligned accesses */
    238 #define	CPU_UNALIGNED_SIGBUS	5	/* int: SIGBUS unaligned accesses */
    239 #define	CPU_BOOTED_KERNEL	6	/* string: booted kernel name */
    240 #define	CPU_FP_SYNC_COMPLETE	7	/* int: always fixup sync fp traps */
    241 #define	CPU_MAXID		8	/* 7 valid machdep IDs */
    242 
    243 #ifdef _KERNEL
    244 
    245 struct pcb;
    246 struct proc;
    247 struct reg;
    248 struct rpb;
    249 struct trapframe;
    250 
    251 int	badaddr(void *, size_t);
    252 
    253 #define	cpu_idle()	/* nothing */
    254 
    255 #endif /* _KERNEL */
    256 #endif /* _ALPHA_CPU_H_ */
    257