intr.h revision 1.17
1 1.17 thorpej /* $NetBSD: intr.h,v 1.17 1998/09/25 22:06:33 thorpej Exp $ */ 2 1.1 cgd 3 1.1 cgd /* 4 1.6 cgd * Copyright (c) 1997 Christopher G. Demetriou. All rights reserved. 5 1.1 cgd * Copyright (c) 1996 Carnegie-Mellon University. 6 1.1 cgd * All rights reserved. 7 1.1 cgd * 8 1.1 cgd * Author: Chris G. Demetriou 9 1.1 cgd * 10 1.1 cgd * Permission to use, copy, modify and distribute this software and 11 1.1 cgd * its documentation is hereby granted, provided that both the copyright 12 1.1 cgd * notice and this permission notice appear in all copies of the 13 1.1 cgd * software, derivative works or modified versions, and any portions 14 1.1 cgd * thereof, and that both notices appear in supporting documentation. 15 1.1 cgd * 16 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 17 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 18 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 1.1 cgd * 20 1.1 cgd * Carnegie Mellon requests users of this software to return to 21 1.1 cgd * 22 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 23 1.1 cgd * School of Computer Science 24 1.1 cgd * Carnegie Mellon University 25 1.1 cgd * Pittsburgh PA 15213-3890 26 1.1 cgd * 27 1.1 cgd * any improvements or extensions that they make and grant Carnegie the 28 1.1 cgd * rights to redistribute these changes. 29 1.1 cgd */ 30 1.1 cgd 31 1.2 cgd #ifndef _ALPHA_INTR_H_ 32 1.2 cgd #define _ALPHA_INTR_H_ 33 1.2 cgd 34 1.3 cgd #include <sys/queue.h> 35 1.3 cgd 36 1.1 cgd #define IPL_NONE 0 /* disable only this interrupt */ 37 1.1 cgd #define IPL_BIO 1 /* disable block I/O interrupts */ 38 1.1 cgd #define IPL_NET 2 /* disable network interrupts */ 39 1.1 cgd #define IPL_TTY 3 /* disable terminal interrupts */ 40 1.1 cgd #define IPL_CLOCK 4 /* disable clock interrupts */ 41 1.1 cgd #define IPL_HIGH 5 /* disable all interrupts */ 42 1.16 matt #define IPL_SERIAL 6 /* disable serial interrupts */ 43 1.1 cgd 44 1.3 cgd #define IST_UNUSABLE -1 /* interrupt cannot be used */ 45 1.1 cgd #define IST_NONE 0 /* none (dummy) */ 46 1.1 cgd #define IST_PULSE 1 /* pulsed */ 47 1.1 cgd #define IST_EDGE 2 /* edge-triggered */ 48 1.1 cgd #define IST_LEVEL 3 /* level-triggered */ 49 1.17 thorpej 50 1.11 mjacob #ifdef _KERNEL 51 1.2 cgd 52 1.6 cgd /* IPL-lowering/restoring macros */ 53 1.2 cgd #define splx(s) \ 54 1.7 cgd ((s) == ALPHA_PSL_IPL_0 ? spl0() : alpha_pal_swpipl(s)) 55 1.2 cgd #define splsoft() alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT) 56 1.16 matt #define splsoftserial() splsoft() 57 1.16 matt #define splsoftclock() splsoft() 58 1.16 matt #define splsoftnet() splsoft() 59 1.6 cgd 60 1.8 cgd /* IPL-raising functions/macros */ 61 1.10 cgd static __inline int _splraise __P((int)) __attribute__ ((unused)); 62 1.8 cgd static __inline int 63 1.8 cgd _splraise(s) 64 1.8 cgd int s; 65 1.8 cgd { 66 1.8 cgd int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK; 67 1.9 cgd return (s > cur ? alpha_pal_swpipl(s) : cur); 68 1.8 cgd } 69 1.6 cgd #define splnet() _splraise(ALPHA_PSL_IPL_IO) 70 1.6 cgd #define splbio() _splraise(ALPHA_PSL_IPL_IO) 71 1.6 cgd #define splimp() _splraise(ALPHA_PSL_IPL_IO) 72 1.6 cgd #define spltty() _splraise(ALPHA_PSL_IPL_IO) 73 1.16 matt #define splserial() _splraise(ALPHA_PSL_IPL_IO) 74 1.6 cgd #define splclock() _splraise(ALPHA_PSL_IPL_CLOCK) 75 1.6 cgd #define splstatclock() _splraise(ALPHA_PSL_IPL_CLOCK) 76 1.6 cgd #define splhigh() _splraise(ALPHA_PSL_IPL_HIGH) 77 1.14 is 78 1.14 is #define spllpt() spltty() 79 1.2 cgd 80 1.2 cgd /* 81 1.2 cgd * simulated software interrupt register 82 1.2 cgd */ 83 1.2 cgd extern u_int64_t ssir; 84 1.2 cgd 85 1.2 cgd #define SIR_NET 0x1 86 1.2 cgd #define SIR_CLOCK 0x2 87 1.16 matt #define SIR_SERIAL 0x4 88 1.2 cgd 89 1.2 cgd #define setsoftnet() ssir |= SIR_NET 90 1.2 cgd #define setsoftclock() ssir |= SIR_CLOCK 91 1.16 matt #define setsoftserial() ssir |= SIR_SERIAL 92 1.3 cgd 93 1.3 cgd /* 94 1.3 cgd * Alpha shared-interrupt-line common code. 95 1.3 cgd */ 96 1.3 cgd 97 1.3 cgd struct alpha_shared_intrhand { 98 1.3 cgd TAILQ_ENTRY(alpha_shared_intrhand) 99 1.3 cgd ih_q; 100 1.3 cgd int (*ih_fn) __P((void *)); 101 1.3 cgd void *ih_arg; 102 1.3 cgd int ih_level; 103 1.15 thorpej unsigned int ih_num; 104 1.3 cgd }; 105 1.3 cgd 106 1.3 cgd struct alpha_shared_intr { 107 1.3 cgd TAILQ_HEAD(,alpha_shared_intrhand) 108 1.3 cgd intr_q; 109 1.3 cgd int intr_sharetype; 110 1.3 cgd int intr_dfltsharetype; 111 1.3 cgd int intr_nstrays; 112 1.3 cgd int intr_maxstrays; 113 1.3 cgd }; 114 1.12 thorpej 115 1.13 thorpej #define ALPHA_SHARED_INTR_DISABLE(asi, num) \ 116 1.13 thorpej ((asi)[num].intr_maxstrays != 0 && \ 117 1.13 thorpej (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays) 118 1.3 cgd 119 1.3 cgd struct alpha_shared_intr *alpha_shared_intr_alloc __P((unsigned int)); 120 1.3 cgd int alpha_shared_intr_dispatch __P((struct alpha_shared_intr *, 121 1.3 cgd unsigned int)); 122 1.3 cgd void *alpha_shared_intr_establish __P((struct alpha_shared_intr *, 123 1.3 cgd unsigned int, int, int, int (*)(void *), void *, const char *)); 124 1.15 thorpej void alpha_shared_intr_disestablish __P((struct alpha_shared_intr *, 125 1.15 thorpej void *, const char *)); 126 1.3 cgd int alpha_shared_intr_get_sharetype __P((struct alpha_shared_intr *, 127 1.3 cgd unsigned int)); 128 1.3 cgd int alpha_shared_intr_isactive __P((struct alpha_shared_intr *, 129 1.3 cgd unsigned int)); 130 1.3 cgd void alpha_shared_intr_set_dfltsharetype __P((struct alpha_shared_intr *, 131 1.3 cgd unsigned int, int)); 132 1.3 cgd void alpha_shared_intr_set_maxstrays __P((struct alpha_shared_intr *, 133 1.3 cgd unsigned int, int)); 134 1.3 cgd void alpha_shared_intr_stray __P((struct alpha_shared_intr *, unsigned int, 135 1.3 cgd const char *)); 136 1.2 cgd 137 1.17 thorpej #endif /* _KERNEL */ 138 1.17 thorpej #endif /* ! _ALPHA_INTR_H_ */ 139
Indexes created Sat Sep 27 22:09:54 GMT 2025