intr.h revision 1.27 1 1.27 thorpej /* $NetBSD: intr.h,v 1.27 2000/06/04 05:23:18 thorpej Exp $ */
2 1.26 thorpej
3 1.26 thorpej /*-
4 1.26 thorpej * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.26 thorpej * All rights reserved.
6 1.26 thorpej *
7 1.26 thorpej * This code is derived from software contributed to The NetBSD Foundation
8 1.26 thorpej * by Jason R. Thorpe.
9 1.26 thorpej *
10 1.26 thorpej * Redistribution and use in source and binary forms, with or without
11 1.26 thorpej * modification, are permitted provided that the following conditions
12 1.26 thorpej * are met:
13 1.26 thorpej * 1. Redistributions of source code must retain the above copyright
14 1.26 thorpej * notice, this list of conditions and the following disclaimer.
15 1.26 thorpej * 2. Redistributions in binary form must reproduce the above copyright
16 1.26 thorpej * notice, this list of conditions and the following disclaimer in the
17 1.26 thorpej * documentation and/or other materials provided with the distribution.
18 1.26 thorpej * 3. All advertising materials mentioning features or use of this software
19 1.26 thorpej * must display the following acknowledgement:
20 1.26 thorpej * This product includes software developed by the NetBSD
21 1.26 thorpej * Foundation, Inc. and its contributors.
22 1.26 thorpej * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.26 thorpej * contributors may be used to endorse or promote products derived
24 1.26 thorpej * from this software without specific prior written permission.
25 1.26 thorpej *
26 1.26 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.26 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.26 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.26 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.26 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.26 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.26 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.26 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.26 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.26 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.26 thorpej * POSSIBILITY OF SUCH DAMAGE.
37 1.26 thorpej */
38 1.1 cgd
39 1.1 cgd /*
40 1.6 cgd * Copyright (c) 1997 Christopher G. Demetriou. All rights reserved.
41 1.1 cgd * Copyright (c) 1996 Carnegie-Mellon University.
42 1.1 cgd * All rights reserved.
43 1.1 cgd *
44 1.1 cgd * Author: Chris G. Demetriou
45 1.1 cgd *
46 1.1 cgd * Permission to use, copy, modify and distribute this software and
47 1.1 cgd * its documentation is hereby granted, provided that both the copyright
48 1.1 cgd * notice and this permission notice appear in all copies of the
49 1.1 cgd * software, derivative works or modified versions, and any portions
50 1.1 cgd * thereof, and that both notices appear in supporting documentation.
51 1.1 cgd *
52 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
53 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
54 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
55 1.1 cgd *
56 1.1 cgd * Carnegie Mellon requests users of this software to return to
57 1.1 cgd *
58 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
59 1.1 cgd * School of Computer Science
60 1.1 cgd * Carnegie Mellon University
61 1.1 cgd * Pittsburgh PA 15213-3890
62 1.1 cgd *
63 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
64 1.1 cgd * rights to redistribute these changes.
65 1.1 cgd */
66 1.1 cgd
67 1.2 cgd #ifndef _ALPHA_INTR_H_
68 1.2 cgd #define _ALPHA_INTR_H_
69 1.2 cgd
70 1.26 thorpej #include <sys/lock.h>
71 1.3 cgd #include <sys/queue.h>
72 1.23 thorpej #include <machine/atomic.h>
73 1.3 cgd
74 1.26 thorpej /*
75 1.26 thorpej * Alpha interrupts come in at one of 4 levels:
76 1.26 thorpej *
77 1.26 thorpej * software interrupt level
78 1.26 thorpej * i/o level 1
79 1.26 thorpej * i/o level 2
80 1.26 thorpej * clock level
81 1.26 thorpej *
82 1.26 thorpej * However, since we do not have any way to know which hardware
83 1.26 thorpej * level a particular i/o interrupt comes in on, we have to
84 1.26 thorpej * whittle it down to 3.
85 1.26 thorpej */
86 1.26 thorpej
87 1.26 thorpej #define IPL_NONE 1 /* disable only this interrupt */
88 1.1 cgd #define IPL_BIO 1 /* disable block I/O interrupts */
89 1.26 thorpej #define IPL_NET 1 /* disable network interrupts */
90 1.26 thorpej #define IPL_TTY 1 /* disable terminal interrupts */
91 1.26 thorpej #define IPL_CLOCK 2 /* disable clock interrupts */
92 1.26 thorpej #define IPL_HIGH 3 /* disable all interrupts */
93 1.26 thorpej #define IPL_SERIAL 1 /* disable serial interrupts */
94 1.26 thorpej
95 1.26 thorpej #define IPL_SOFTSERIAL 0 /* serial software interrupts */
96 1.26 thorpej #define IPL_SOFTNET 1 /* network software interrupts */
97 1.26 thorpej #define IPL_SOFTCLOCK 2 /* clock software interrupts */
98 1.26 thorpej #define IPL_SOFT 3 /* other software interrupts */
99 1.26 thorpej #define IPL_NSOFT 4
100 1.1 cgd
101 1.3 cgd #define IST_UNUSABLE -1 /* interrupt cannot be used */
102 1.1 cgd #define IST_NONE 0 /* none (dummy) */
103 1.1 cgd #define IST_PULSE 1 /* pulsed */
104 1.1 cgd #define IST_EDGE 2 /* edge-triggered */
105 1.1 cgd #define IST_LEVEL 3 /* level-triggered */
106 1.17 thorpej
107 1.11 mjacob #ifdef _KERNEL
108 1.2 cgd
109 1.6 cgd /* IPL-lowering/restoring macros */
110 1.2 cgd #define splx(s) \
111 1.7 cgd ((s) == ALPHA_PSL_IPL_0 ? spl0() : alpha_pal_swpipl(s))
112 1.20 thorpej #define spllowersoftclock() alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT)
113 1.6 cgd
114 1.8 cgd /* IPL-raising functions/macros */
115 1.8 cgd static __inline int
116 1.27 thorpej _splraise(int s)
117 1.8 cgd {
118 1.8 cgd int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK;
119 1.9 cgd return (s > cur ? alpha_pal_swpipl(s) : cur);
120 1.8 cgd }
121 1.20 thorpej #define splsoft() _splraise(ALPHA_PSL_IPL_SOFT)
122 1.20 thorpej #define splsoftserial() splsoft()
123 1.20 thorpej #define splsoftclock() splsoft()
124 1.20 thorpej #define splsoftnet() splsoft()
125 1.6 cgd #define splnet() _splraise(ALPHA_PSL_IPL_IO)
126 1.6 cgd #define splbio() _splraise(ALPHA_PSL_IPL_IO)
127 1.6 cgd #define splimp() _splraise(ALPHA_PSL_IPL_IO)
128 1.6 cgd #define spltty() _splraise(ALPHA_PSL_IPL_IO)
129 1.16 matt #define splserial() _splraise(ALPHA_PSL_IPL_IO)
130 1.6 cgd #define splclock() _splraise(ALPHA_PSL_IPL_CLOCK)
131 1.6 cgd #define splstatclock() _splraise(ALPHA_PSL_IPL_CLOCK)
132 1.6 cgd #define splhigh() _splraise(ALPHA_PSL_IPL_HIGH)
133 1.14 is
134 1.14 is #define spllpt() spltty()
135 1.2 cgd
136 1.2 cgd /*
137 1.19 thorpej * Interprocessor interrupts. In order how we want them processed.
138 1.18 thorpej */
139 1.22 thorpej #define ALPHA_IPI_HALT 0x0000000000000001UL
140 1.22 thorpej #define ALPHA_IPI_TBIA 0x0000000000000002UL
141 1.22 thorpej #define ALPHA_IPI_TBIAP 0x0000000000000004UL
142 1.22 thorpej #define ALPHA_IPI_SHOOTDOWN 0x0000000000000008UL
143 1.22 thorpej #define ALPHA_IPI_IMB 0x0000000000000010UL
144 1.22 thorpej #define ALPHA_IPI_AST 0x0000000000000020UL
145 1.19 thorpej
146 1.22 thorpej #define ALPHA_NIPIS 6 /* must not exceed 64 */
147 1.18 thorpej
148 1.27 thorpej typedef void (*ipifunc_t)(void);
149 1.18 thorpej extern ipifunc_t ipifuncs[ALPHA_NIPIS];
150 1.18 thorpej
151 1.27 thorpej void alpha_send_ipi(unsigned long, unsigned long);
152 1.27 thorpej void alpha_broadcast_ipi(unsigned long);
153 1.3 cgd
154 1.3 cgd /*
155 1.3 cgd * Alpha shared-interrupt-line common code.
156 1.3 cgd */
157 1.3 cgd
158 1.3 cgd struct alpha_shared_intrhand {
159 1.3 cgd TAILQ_ENTRY(alpha_shared_intrhand)
160 1.3 cgd ih_q;
161 1.24 thorpej struct alpha_shared_intr *ih_intrhead;
162 1.27 thorpej int (*ih_fn)(void *);
163 1.3 cgd void *ih_arg;
164 1.3 cgd int ih_level;
165 1.15 thorpej unsigned int ih_num;
166 1.3 cgd };
167 1.3 cgd
168 1.3 cgd struct alpha_shared_intr {
169 1.3 cgd TAILQ_HEAD(,alpha_shared_intrhand)
170 1.3 cgd intr_q;
171 1.22 thorpej void *intr_private;
172 1.3 cgd int intr_sharetype;
173 1.3 cgd int intr_dfltsharetype;
174 1.3 cgd int intr_nstrays;
175 1.3 cgd int intr_maxstrays;
176 1.3 cgd };
177 1.12 thorpej
178 1.13 thorpej #define ALPHA_SHARED_INTR_DISABLE(asi, num) \
179 1.13 thorpej ((asi)[num].intr_maxstrays != 0 && \
180 1.13 thorpej (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays)
181 1.26 thorpej
182 1.26 thorpej /*
183 1.26 thorpej * simulated software interrupt register
184 1.26 thorpej */
185 1.26 thorpej extern u_int64_t ssir;
186 1.26 thorpej
187 1.26 thorpej #define setsoft(x) atomic_setbits_ulong(&ssir, 1 << (x))
188 1.26 thorpej
189 1.26 thorpej #define __GENERIC_SOFT_INTERRUPTS
190 1.26 thorpej struct alpha_soft_intrhand {
191 1.26 thorpej LIST_ENTRY(alpha_soft_intrhand)
192 1.26 thorpej sih_q;
193 1.26 thorpej struct alpha_soft_intr *sih_intrhead;
194 1.27 thorpej void (*sih_fn)(void *);
195 1.26 thorpej void *sih_arg;
196 1.26 thorpej int sih_pending;
197 1.26 thorpej };
198 1.26 thorpej
199 1.26 thorpej struct alpha_soft_intr {
200 1.26 thorpej LIST_HEAD(, alpha_soft_intrhand)
201 1.26 thorpej softintr_q;
202 1.26 thorpej struct simplelock softintr_slock;
203 1.26 thorpej unsigned long softintr_ipl;
204 1.26 thorpej };
205 1.26 thorpej
206 1.27 thorpej void *softintr_establish(int, void (*)(void *), void *);
207 1.27 thorpej void softintr_disestablish(void *);
208 1.27 thorpej void softintr_init(void);
209 1.27 thorpej void softintr_dispatch(void);
210 1.26 thorpej
211 1.26 thorpej #define softintr_schedule(arg) \
212 1.26 thorpej do { \
213 1.26 thorpej struct alpha_soft_intrhand *__sih = (arg); \
214 1.26 thorpej __sih->sih_pending = 1; \
215 1.26 thorpej setsoft(__sih->sih_intrhead->softintr_ipl); \
216 1.26 thorpej } while (0)
217 1.26 thorpej
218 1.26 thorpej /* XXX For legacy software interrupts. */
219 1.26 thorpej extern struct alpha_soft_intrhand *softnet_intrhand;
220 1.26 thorpej extern struct alpha_soft_intrhand *softclock_intrhand;
221 1.26 thorpej
222 1.26 thorpej #define setsoftnet() softintr_schedule(softnet_intrhand)
223 1.26 thorpej #define setsoftclock() softintr_schedule(softclock_intrhand)
224 1.3 cgd
225 1.27 thorpej struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int);
226 1.27 thorpej int alpha_shared_intr_dispatch(struct alpha_shared_intr *,
227 1.27 thorpej unsigned int);
228 1.27 thorpej void *alpha_shared_intr_establish(struct alpha_shared_intr *,
229 1.27 thorpej unsigned int, int, int, int (*)(void *), void *, const char *);
230 1.27 thorpej void alpha_shared_intr_disestablish(struct alpha_shared_intr *,
231 1.27 thorpej void *, const char *);
232 1.27 thorpej int alpha_shared_intr_get_sharetype(struct alpha_shared_intr *,
233 1.27 thorpej unsigned int);
234 1.27 thorpej int alpha_shared_intr_isactive(struct alpha_shared_intr *,
235 1.27 thorpej unsigned int);
236 1.27 thorpej void alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *,
237 1.27 thorpej unsigned int, int);
238 1.27 thorpej void alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *,
239 1.27 thorpej unsigned int, int);
240 1.27 thorpej void alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int,
241 1.27 thorpej const char *);
242 1.27 thorpej void alpha_shared_intr_set_private(struct alpha_shared_intr *,
243 1.27 thorpej unsigned int, void *);
244 1.27 thorpej void *alpha_shared_intr_get_private(struct alpha_shared_intr *,
245 1.27 thorpej unsigned int);
246 1.2 cgd
247 1.17 thorpej #endif /* _KERNEL */
248 1.17 thorpej #endif /* ! _ALPHA_INTR_H_ */
249