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intr.h revision 1.3 
      1  1.3  cgd /*	$NetBSD: intr.h,v 1.3 1996/11/17 02:03:10 cgd Exp $	*/
      2  1.1  cgd 
      3  1.1  cgd /*
      4  1.1  cgd  * Copyright (c) 1996 Carnegie-Mellon University.
      5  1.1  cgd  * All rights reserved.
      6  1.1  cgd  *
      7  1.1  cgd  * Author: Chris G. Demetriou
      8  1.1  cgd  *
      9  1.1  cgd  * Permission to use, copy, modify and distribute this software and
     10  1.1  cgd  * its documentation is hereby granted, provided that both the copyright
     11  1.1  cgd  * notice and this permission notice appear in all copies of the
     12  1.1  cgd  * software, derivative works or modified versions, and any portions
     13  1.1  cgd  * thereof, and that both notices appear in supporting documentation.
     14  1.1  cgd  *
     15  1.1  cgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  1.1  cgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  1.1  cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  1.1  cgd  *
     19  1.1  cgd  * Carnegie Mellon requests users of this software to return to
     20  1.1  cgd  *
     21  1.1  cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  1.1  cgd  *  School of Computer Science
     23  1.1  cgd  *  Carnegie Mellon University
     24  1.1  cgd  *  Pittsburgh PA 15213-3890
     25  1.1  cgd  *
     26  1.1  cgd  * any improvements or extensions that they make and grant Carnegie the
     27  1.1  cgd  * rights to redistribute these changes.
     28  1.1  cgd  */
     29  1.1  cgd 
     30  1.2  cgd #ifndef _ALPHA_INTR_H_
     31  1.2  cgd #define _ALPHA_INTR_H_
     32  1.2  cgd 
     33  1.3  cgd #include <sys/queue.h>
     34  1.3  cgd 
     35  1.1  cgd #define	IPL_NONE	0	/* disable only this interrupt */
     36  1.1  cgd #define	IPL_BIO		1	/* disable block I/O interrupts */
     37  1.1  cgd #define	IPL_NET		2	/* disable network interrupts */
     38  1.1  cgd #define	IPL_TTY		3	/* disable terminal interrupts */
     39  1.1  cgd #define	IPL_CLOCK	4	/* disable clock interrupts */
     40  1.1  cgd #define	IPL_HIGH	5	/* disable all interrupts */
     41  1.1  cgd 
     42  1.3  cgd #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
     43  1.1  cgd #define	IST_NONE	0	/* none (dummy) */
     44  1.1  cgd #define	IST_PULSE	1	/* pulsed */
     45  1.1  cgd #define	IST_EDGE	2	/* edge-triggered */
     46  1.1  cgd #define	IST_LEVEL	3	/* level-triggered */
     47  1.2  cgd 
     48  1.2  cgd #define splx(s)								\
     49  1.2  cgd 	    (s == ALPHA_PSL_IPL_0 ? spl0() : alpha_pal_swpipl(s))
     50  1.2  cgd #define splsoft()               alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT)
     51  1.2  cgd #define splsoftclock()          splsoft()
     52  1.2  cgd #define splsoftnet()            splsoft()
     53  1.2  cgd #define splnet()                alpha_pal_swpipl(ALPHA_PSL_IPL_IO)
     54  1.2  cgd #define splbio()                alpha_pal_swpipl(ALPHA_PSL_IPL_IO)
     55  1.2  cgd #define splimp()                alpha_pal_swpipl(ALPHA_PSL_IPL_IO)
     56  1.2  cgd #define spltty()                alpha_pal_swpipl(ALPHA_PSL_IPL_IO)
     57  1.2  cgd #define splclock()              alpha_pal_swpipl(ALPHA_PSL_IPL_CLOCK)
     58  1.2  cgd #define splstatclock()          alpha_pal_swpipl(ALPHA_PSL_IPL_CLOCK)
     59  1.2  cgd #define splhigh()               alpha_pal_swpipl(ALPHA_PSL_IPL_HIGH)
     60  1.2  cgd 
     61  1.2  cgd /*
     62  1.2  cgd  * simulated software interrupt register
     63  1.2  cgd  */
     64  1.2  cgd extern u_int64_t ssir;
     65  1.2  cgd 
     66  1.2  cgd #define	SIR_NET		0x1
     67  1.2  cgd #define	SIR_CLOCK	0x2
     68  1.2  cgd 
     69  1.2  cgd #define	siroff(x)	ssir &= ~(x)
     70  1.2  cgd #define	setsoftnet()	ssir |= SIR_NET
     71  1.2  cgd #define	setsoftclock()	ssir |= SIR_CLOCK
     72  1.3  cgd 
     73  1.3  cgd /*
     74  1.3  cgd  * Alpha shared-interrupt-line common code.
     75  1.3  cgd  */
     76  1.3  cgd 
     77  1.3  cgd struct alpha_shared_intrhand {
     78  1.3  cgd 	TAILQ_ENTRY(alpha_shared_intrhand)
     79  1.3  cgd 		ih_q;
     80  1.3  cgd 	int	(*ih_fn) __P((void *));
     81  1.3  cgd 	void	*ih_arg;
     82  1.3  cgd 	int	ih_level;
     83  1.3  cgd };
     84  1.3  cgd 
     85  1.3  cgd struct alpha_shared_intr {
     86  1.3  cgd 	TAILQ_HEAD(,alpha_shared_intrhand)
     87  1.3  cgd 		intr_q;
     88  1.3  cgd 	int	intr_sharetype;
     89  1.3  cgd 	int	intr_dfltsharetype;
     90  1.3  cgd 	int	intr_nstrays;
     91  1.3  cgd 	int	intr_maxstrays;
     92  1.3  cgd };
     93  1.3  cgd 
     94  1.3  cgd struct alpha_shared_intr *alpha_shared_intr_alloc __P((unsigned int));
     95  1.3  cgd int	alpha_shared_intr_dispatch __P((struct alpha_shared_intr *,
     96  1.3  cgd 	    unsigned int));
     97  1.3  cgd void	*alpha_shared_intr_establish __P((struct alpha_shared_intr *,
     98  1.3  cgd 	    unsigned int, int, int, int (*)(void *), void *, const char *));
     99  1.3  cgd int	alpha_shared_intr_get_sharetype __P((struct alpha_shared_intr *,
    100  1.3  cgd 	    unsigned int));
    101  1.3  cgd int	alpha_shared_intr_isactive __P((struct alpha_shared_intr *,
    102  1.3  cgd 	    unsigned int));
    103  1.3  cgd void	alpha_shared_intr_set_dfltsharetype __P((struct alpha_shared_intr *,
    104  1.3  cgd 	    unsigned int, int));
    105  1.3  cgd void	alpha_shared_intr_set_maxstrays __P((struct alpha_shared_intr *,
    106  1.3  cgd 	    unsigned int, int));
    107  1.3  cgd void	alpha_shared_intr_stray __P((struct alpha_shared_intr *, unsigned int,
    108  1.3  cgd 	    const char *));
    109  1.2  cgd 
    110  1.2  cgd #endif
    111