intr.h revision 1.24
1 /* $NetBSD: intr.h,v 1.24 2000/03/19 01:46:18 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1996 Carnegie-Mellon University. 6 * All rights reserved. 7 * 8 * Author: Chris G. Demetriou 9 * 10 * Permission to use, copy, modify and distribute this software and 11 * its documentation is hereby granted, provided that both the copyright 12 * notice and this permission notice appear in all copies of the 13 * software, derivative works or modified versions, and any portions 14 * thereof, and that both notices appear in supporting documentation. 15 * 16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 18 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 * 20 * Carnegie Mellon requests users of this software to return to 21 * 22 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 23 * School of Computer Science 24 * Carnegie Mellon University 25 * Pittsburgh PA 15213-3890 26 * 27 * any improvements or extensions that they make and grant Carnegie the 28 * rights to redistribute these changes. 29 */ 30 31 #ifndef _ALPHA_INTR_H_ 32 #define _ALPHA_INTR_H_ 33 34 #include <sys/queue.h> 35 #include <machine/atomic.h> 36 37 #define IPL_NONE 0 /* disable only this interrupt */ 38 #define IPL_BIO 1 /* disable block I/O interrupts */ 39 #define IPL_NET 2 /* disable network interrupts */ 40 #define IPL_TTY 3 /* disable terminal interrupts */ 41 #define IPL_CLOCK 4 /* disable clock interrupts */ 42 #define IPL_HIGH 5 /* disable all interrupts */ 43 #define IPL_SERIAL 6 /* disable serial interrupts */ 44 45 #define IST_UNUSABLE -1 /* interrupt cannot be used */ 46 #define IST_NONE 0 /* none (dummy) */ 47 #define IST_PULSE 1 /* pulsed */ 48 #define IST_EDGE 2 /* edge-triggered */ 49 #define IST_LEVEL 3 /* level-triggered */ 50 51 #ifdef _KERNEL 52 53 /* IPL-lowering/restoring macros */ 54 #define splx(s) \ 55 ((s) == ALPHA_PSL_IPL_0 ? spl0() : alpha_pal_swpipl(s)) 56 #define spllowersoftclock() alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT) 57 58 /* IPL-raising functions/macros */ 59 static __inline int _splraise __P((int)) __attribute__ ((unused)); 60 static __inline int 61 _splraise(s) 62 int s; 63 { 64 int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK; 65 return (s > cur ? alpha_pal_swpipl(s) : cur); 66 } 67 #define splsoft() _splraise(ALPHA_PSL_IPL_SOFT) 68 #define splsoftserial() splsoft() 69 #define splsoftclock() splsoft() 70 #define splsoftnet() splsoft() 71 #define splnet() _splraise(ALPHA_PSL_IPL_IO) 72 #define splbio() _splraise(ALPHA_PSL_IPL_IO) 73 #define splimp() _splraise(ALPHA_PSL_IPL_IO) 74 #define spltty() _splraise(ALPHA_PSL_IPL_IO) 75 #define splserial() _splraise(ALPHA_PSL_IPL_IO) 76 #define splclock() _splraise(ALPHA_PSL_IPL_CLOCK) 77 #define splstatclock() _splraise(ALPHA_PSL_IPL_CLOCK) 78 #define splhigh() _splraise(ALPHA_PSL_IPL_HIGH) 79 80 #define spllpt() spltty() 81 82 /* 83 * simulated software interrupt register 84 */ 85 extern u_int64_t ssir; 86 87 #define SIR_NET 0x1 88 #define SIR_CLOCK 0x2 89 #define SIR_SERIAL 0x4 90 91 #define setsoft(x) alpha_atomic_setbits_q(&ssir, (x)) 92 93 #define setsoftnet() setsoft(SIR_NET) 94 #define setsoftclock() setsoft(SIR_CLOCK) 95 #define setsoftserial() setsoft(SIR_SERIAL) 96 97 /* 98 * Interprocessor interrupts. In order how we want them processed. 99 */ 100 #define ALPHA_IPI_HALT 0x0000000000000001UL 101 #define ALPHA_IPI_TBIA 0x0000000000000002UL 102 #define ALPHA_IPI_TBIAP 0x0000000000000004UL 103 #define ALPHA_IPI_SHOOTDOWN 0x0000000000000008UL 104 #define ALPHA_IPI_IMB 0x0000000000000010UL 105 #define ALPHA_IPI_AST 0x0000000000000020UL 106 107 #define ALPHA_NIPIS 6 /* must not exceed 64 */ 108 109 typedef void (*ipifunc_t) __P((void)); 110 extern ipifunc_t ipifuncs[ALPHA_NIPIS]; 111 112 void alpha_send_ipi __P((unsigned long, unsigned long)); 113 void alpha_broadcast_ipi __P((unsigned long)); 114 115 /* 116 * Alpha shared-interrupt-line common code. 117 */ 118 119 struct alpha_shared_intrhand { 120 TAILQ_ENTRY(alpha_shared_intrhand) 121 ih_q; 122 struct alpha_shared_intr *ih_intrhead; 123 int (*ih_fn) __P((void *)); 124 void *ih_arg; 125 int ih_level; 126 unsigned int ih_num; 127 }; 128 129 struct alpha_shared_intr { 130 TAILQ_HEAD(,alpha_shared_intrhand) 131 intr_q; 132 void *intr_private; 133 int intr_sharetype; 134 int intr_dfltsharetype; 135 int intr_nstrays; 136 int intr_maxstrays; 137 }; 138 139 #define ALPHA_SHARED_INTR_DISABLE(asi, num) \ 140 ((asi)[num].intr_maxstrays != 0 && \ 141 (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays) 142 143 struct alpha_shared_intr *alpha_shared_intr_alloc __P((unsigned int)); 144 int alpha_shared_intr_dispatch __P((struct alpha_shared_intr *, 145 unsigned int)); 146 void *alpha_shared_intr_establish __P((struct alpha_shared_intr *, 147 unsigned int, int, int, int (*)(void *), void *, const char *)); 148 void alpha_shared_intr_disestablish __P((struct alpha_shared_intr *, 149 void *, const char *)); 150 int alpha_shared_intr_get_sharetype __P((struct alpha_shared_intr *, 151 unsigned int)); 152 int alpha_shared_intr_isactive __P((struct alpha_shared_intr *, 153 unsigned int)); 154 void alpha_shared_intr_set_dfltsharetype __P((struct alpha_shared_intr *, 155 unsigned int, int)); 156 void alpha_shared_intr_set_maxstrays __P((struct alpha_shared_intr *, 157 unsigned int, int)); 158 void alpha_shared_intr_stray __P((struct alpha_shared_intr *, unsigned int, 159 const char *)); 160 void alpha_shared_intr_set_private __P((struct alpha_shared_intr *, 161 unsigned int, void *)); 162 void *alpha_shared_intr_get_private __P((struct alpha_shared_intr *, 163 unsigned int)); 164 165 #endif /* _KERNEL */ 166 #endif /* ! _ALPHA_INTR_H_ */ 167
Indexes created Sun Sep 28 16:09:52 GMT 2025