intr.h revision 1.44
1 /* $NetBSD: intr.h,v 1.44 2001/04/15 23:26:05 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1997 Christopher G. Demetriou. All rights reserved. 41 * Copyright (c) 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 #ifndef _ALPHA_INTR_H_ 68 #define _ALPHA_INTR_H_ 69 70 #include <sys/device.h> 71 #include <sys/lock.h> 72 #include <sys/queue.h> 73 #include <machine/atomic.h> 74 75 /* 76 * Alpha interrupts come in at one of 4 levels: 77 * 78 * software interrupt level 79 * i/o level 1 80 * i/o level 2 81 * clock level 82 * 83 * However, since we do not have any way to know which hardware 84 * level a particular i/o interrupt comes in on, we have to 85 * whittle it down to 3. 86 */ 87 88 #define IPL_NONE 1 /* disable only this interrupt */ 89 #define IPL_BIO 1 /* disable block I/O interrupts */ 90 #define IPL_NET 1 /* disable network interrupts */ 91 #define IPL_TTY 1 /* disable terminal interrupts */ 92 #define IPL_CLOCK 2 /* disable clock interrupts */ 93 #define IPL_HIGH 3 /* disable all interrupts */ 94 #define IPL_SERIAL 1 /* disable serial interrupts */ 95 96 #define IPL_SOFTSERIAL 0 /* serial software interrupts */ 97 #define IPL_SOFTNET 1 /* network software interrupts */ 98 #define IPL_SOFTCLOCK 2 /* clock software interrupts */ 99 #define IPL_SOFT 3 /* other software interrupts */ 100 #define IPL_NSOFT 4 101 102 #define IPL_SOFTNAMES { \ 103 "serial", \ 104 "net", \ 105 "clock", \ 106 "misc", \ 107 } 108 109 #define IST_UNUSABLE -1 /* interrupt cannot be used */ 110 #define IST_NONE 0 /* none (dummy) */ 111 #define IST_PULSE 1 /* pulsed */ 112 #define IST_EDGE 2 /* edge-triggered */ 113 #define IST_LEVEL 3 /* level-triggered */ 114 115 #ifdef _KERNEL 116 117 /* Simulated software interrupt register. */ 118 extern __volatile unsigned long ssir; 119 120 /* IPL-lowering/restoring macros */ 121 void spl0(void); 122 123 static __inline void 124 splx(int s) 125 { 126 if (s == ALPHA_PSL_IPL_0 && ssir != 0) 127 spl0(); 128 else 129 alpha_pal_swpipl(s); 130 } 131 #define spllowersoftclock() ((void)alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT)) 132 133 /* IPL-raising functions/macros */ 134 static __inline int 135 _splraise(int s) 136 { 137 int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK; 138 return (s > cur ? alpha_pal_swpipl(s) : cur); 139 } 140 #define splsoft() _splraise(ALPHA_PSL_IPL_SOFT) 141 #define splsoftserial() splsoft() 142 #define splsoftclock() splsoft() 143 #define splsoftnet() splsoft() 144 #define splnet() _splraise(ALPHA_PSL_IPL_IO) 145 #define splbio() _splraise(ALPHA_PSL_IPL_IO) 146 #define splvm() _splraise(ALPHA_PSL_IPL_IO) 147 #define spltty() _splraise(ALPHA_PSL_IPL_IO) 148 #define splserial() _splraise(ALPHA_PSL_IPL_IO) 149 #define splclock() _splraise(ALPHA_PSL_IPL_CLOCK) 150 #define splstatclock() _splraise(ALPHA_PSL_IPL_CLOCK) 151 #define splhigh() _splraise(ALPHA_PSL_IPL_HIGH) 152 153 #define splsched() splhigh() 154 #define spllock() splhigh() 155 #define spllpt() spltty() 156 157 /* 158 * Interprocessor interrupts. In order how we want them processed. 159 */ 160 #define ALPHA_IPI_HALT 0x0000000000000001UL 161 #define ALPHA_IPI_TBIA 0x0000000000000002UL 162 #define ALPHA_IPI_TBIAP 0x0000000000000004UL 163 #define ALPHA_IPI_SHOOTDOWN 0x0000000000000008UL 164 #define ALPHA_IPI_IMB 0x0000000000000010UL 165 #define ALPHA_IPI_AST 0x0000000000000020UL 166 #define ALPHA_IPI_SYNCH_FPU 0x0000000000000040UL 167 #define ALPHA_IPI_DISCARD_FPU 0x0000000000000080UL 168 #define ALPHA_IPI_PAUSE 0x0000000000000100UL 169 170 #define ALPHA_NIPIS 9 /* must not exceed 64 */ 171 172 struct cpu_info; 173 struct trapframe; 174 175 void alpha_ipi_init(struct cpu_info *); 176 void alpha_ipi_process(struct cpu_info *, struct trapframe *); 177 void alpha_send_ipi(unsigned long, unsigned long); 178 void alpha_broadcast_ipi(unsigned long); 179 void alpha_multicast_ipi(unsigned long, unsigned long); 180 181 /* 182 * Alpha shared-interrupt-line common code. 183 */ 184 185 struct alpha_shared_intrhand { 186 TAILQ_ENTRY(alpha_shared_intrhand) 187 ih_q; 188 struct alpha_shared_intr *ih_intrhead; 189 int (*ih_fn)(void *); 190 void *ih_arg; 191 int ih_level; 192 unsigned int ih_num; 193 }; 194 195 struct alpha_shared_intr { 196 TAILQ_HEAD(,alpha_shared_intrhand) 197 intr_q; 198 struct evcnt intr_evcnt; 199 char *intr_string; 200 void *intr_private; 201 int intr_sharetype; 202 int intr_dfltsharetype; 203 int intr_nstrays; 204 int intr_maxstrays; 205 }; 206 207 #define ALPHA_SHARED_INTR_DISABLE(asi, num) \ 208 ((asi)[num].intr_maxstrays != 0 && \ 209 (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays) 210 211 #define setsoft(x) atomic_setbits_ulong(&ssir, 1 << (x)) 212 213 struct alpha_soft_intrhand { 214 TAILQ_ENTRY(alpha_soft_intrhand) 215 sih_q; 216 struct alpha_soft_intr *sih_intrhead; 217 void (*sih_fn)(void *); 218 void *sih_arg; 219 int sih_pending; 220 }; 221 222 struct alpha_soft_intr { 223 TAILQ_HEAD(, alpha_soft_intrhand) 224 softintr_q; 225 struct evcnt softintr_evcnt; 226 struct simplelock softintr_slock; 227 unsigned long softintr_ipl; 228 }; 229 230 void *softintr_establish(int, void (*)(void *), void *); 231 void softintr_disestablish(void *); 232 void softintr_init(void); 233 void softintr_dispatch(void); 234 235 #define softintr_schedule(arg) \ 236 do { \ 237 struct alpha_soft_intrhand *__sih = (arg); \ 238 struct alpha_soft_intr *__si = __sih->sih_intrhead; \ 239 int __s; \ 240 \ 241 __s = splhigh(); \ 242 simple_lock(&__si->softintr_slock); \ 243 if (__sih->sih_pending == 0) { \ 244 TAILQ_INSERT_TAIL(&__si->softintr_q, __sih, sih_q); \ 245 __sih->sih_pending = 1; \ 246 setsoft(__si->softintr_ipl); \ 247 } \ 248 simple_unlock(&__si->softintr_slock); \ 249 splx(__s); \ 250 } while (0) 251 252 /* XXX For legacy software interrupts. */ 253 extern struct alpha_soft_intrhand *softnet_intrhand; 254 255 #define setsoftnet() softintr_schedule(softnet_intrhand) 256 257 struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int, unsigned int); 258 int alpha_shared_intr_dispatch(struct alpha_shared_intr *, 259 unsigned int); 260 void *alpha_shared_intr_establish(struct alpha_shared_intr *, 261 unsigned int, int, int, int (*)(void *), void *, const char *); 262 void alpha_shared_intr_disestablish(struct alpha_shared_intr *, 263 void *, const char *); 264 int alpha_shared_intr_get_sharetype(struct alpha_shared_intr *, 265 unsigned int); 266 int alpha_shared_intr_isactive(struct alpha_shared_intr *, 267 unsigned int); 268 void alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *, 269 unsigned int, int); 270 void alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *, 271 unsigned int, int); 272 void alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int, 273 const char *); 274 void alpha_shared_intr_set_private(struct alpha_shared_intr *, 275 unsigned int, void *); 276 void *alpha_shared_intr_get_private(struct alpha_shared_intr *, 277 unsigned int); 278 char *alpha_shared_intr_string(struct alpha_shared_intr *, 279 unsigned int); 280 struct evcnt *alpha_shared_intr_evcnt(struct alpha_shared_intr *, 281 unsigned int); 282 283 void set_iointr(void (*)(void *, unsigned long)); 284 285 #endif /* _KERNEL */ 286 #endif /* ! _ALPHA_INTR_H_ */ 287
Indexes created Sun Sep 28 16:09:52 GMT 2025