intr.h revision 1.57
1 /* $NetBSD: intr.h,v 1.57 2007/01/12 00:55:40 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1997 Christopher G. Demetriou. All rights reserved. 41 * Copyright (c) 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 #ifndef _ALPHA_INTR_H_ 68 #define _ALPHA_INTR_H_ 69 70 #include <sys/device.h> 71 #include <sys/lock.h> 72 #include <sys/queue.h> 73 #include <machine/atomic.h> 74 75 /* 76 * The Alpha System Control Block. This is 8k long, and you get 77 * 16 bytes per vector (i.e. the vector numbers are spaced 16 78 * apart). 79 * 80 * This is sort of a "shadow" SCB -- rather than the CPU jumping 81 * to (SCBaddr + (16 * vector)), like it does on the VAX, we get 82 * a vector number in a1. We use the SCB to look up a routine/arg 83 * and jump to it. 84 * 85 * Since we use the SCB only for I/O interrupts, we make it shorter 86 * than normal, starting it at vector 0x800 (the start of the I/O 87 * interrupt vectors). 88 */ 89 #define SCB_IOVECBASE 0x0800 90 #define SCB_VECSIZE 0x0010 91 #define SCB_SIZE 0x2000 92 93 #define SCB_VECTOIDX(x) ((x) >> 4) 94 #define SCB_IDXTOVEC(x) ((x) << 4) 95 96 #define SCB_NIOVECS SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE) 97 98 struct scbvec { 99 void (*scb_func)(void *, u_long); 100 void *scb_arg; 101 }; 102 103 /* 104 * Alpha interrupts come in at one of 4 levels: 105 * 106 * software interrupt level 107 * i/o level 1 108 * i/o level 2 109 * clock level 110 * 111 * However, since we do not have any way to know which hardware 112 * level a particular i/o interrupt comes in on, we have to 113 * whittle it down to 3. 114 */ 115 116 #define IPL_NONE 0 /* no interrupt level */ 117 #define IPL_SOFT 1 /* generic software interrupts */ 118 #define IPL_SOFTCLOCK 2 /* clock software interrupts */ 119 #define IPL_SOFTNET 3 /* network software interrupts */ 120 #define IPL_SOFTSERIAL 4 /* serial software interrupts */ 121 #define IPL_BIO 5 /* block I/O interrupts */ 122 #define IPL_NET 6 /* network interrupts */ 123 #define IPL_TTY 7 /* terminal interrupts */ 124 #define IPL_LPT IPL_TTY 125 #define IPL_VM 8 /* interrupts that can alloc mem */ 126 #define IPL_CLOCK 9 /* clock interrupts */ 127 #define IPL_IPI IPL_CLOCK /* AARM, 5-2, II-B */ 128 #define IPL_STATCLOCK IPL_CLOCK 129 #define IPL_HIGH 10 /* all interrupts */ 130 #define IPL_SCHED IPL_HIGH 131 #define IPL_LOCK IPL_HIGH 132 #define IPL_SERIAL 11 /* serial interrupts */ 133 134 typedef int ipl_t; 135 typedef struct { 136 uint8_t _psl; 137 } ipl_cookie_t; 138 139 ipl_cookie_t makeiplcookie(ipl_t); 140 141 #define SI_SOFTSERIAL 0 142 #define SI_SOFTNET 1 143 #define SI_SOFTCLOCK 2 144 #define SI_SOFT 3 145 146 #define SI_NQUEUES 4 147 148 #define SI_QUEUENAMES { \ 149 "serial", \ 150 "net", \ 151 "clock", \ 152 "misc", \ 153 } 154 155 #define IST_UNUSABLE -1 /* interrupt cannot be used */ 156 #define IST_NONE 0 /* none (dummy) */ 157 #define IST_PULSE 1 /* pulsed */ 158 #define IST_EDGE 2 /* edge-triggered */ 159 #define IST_LEVEL 3 /* level-triggered */ 160 161 #ifdef _KERNEL 162 163 /* Simulated software interrupt register. */ 164 extern volatile unsigned long ssir; 165 166 /* IPL-lowering/restoring macros */ 167 void spl0(void); 168 169 static __inline void 170 splx(int s) 171 { 172 if (s == ALPHA_PSL_IPL_0 && ssir != 0) 173 spl0(); 174 else 175 alpha_pal_swpipl(s); 176 } 177 #define spllowersoftclock() ((void)alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT)) 178 179 /* IPL-raising functions/macros */ 180 static __inline int 181 _splraise(int s) 182 { 183 int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK; 184 return (s > cur ? alpha_pal_swpipl(s) : cur); 185 } 186 187 #define splraiseipl(icookie) _splraise((icookie)._psl) 188 189 #include <sys/spl.h> 190 191 /* 192 * Interprocessor interrupts. In order how we want them processed. 193 */ 194 #define ALPHA_IPI_HALT (1UL << 0) 195 #define ALPHA_IPI_MICROSET (1UL << 1) 196 #define ALPHA_IPI_SHOOTDOWN (1UL << 2) 197 #define ALPHA_IPI_IMB (1UL << 3) 198 #define ALPHA_IPI_AST (1UL << 4) 199 #define ALPHA_IPI_SYNCH_FPU (1UL << 5) 200 #define ALPHA_IPI_DISCARD_FPU (1UL << 6) 201 #define ALPHA_IPI_PAUSE (1UL << 7) 202 #define ALPHA_IPI_PMAP_REACTIVATE (1UL << 8) 203 204 #define ALPHA_NIPIS 9 /* must not exceed 64 */ 205 206 struct cpu_info; 207 struct trapframe; 208 209 void alpha_ipi_init(struct cpu_info *); 210 void alpha_ipi_process(struct cpu_info *, struct trapframe *); 211 void alpha_send_ipi(unsigned long, unsigned long); 212 void alpha_broadcast_ipi(unsigned long); 213 void alpha_multicast_ipi(unsigned long, unsigned long); 214 215 /* 216 * Alpha shared-interrupt-line common code. 217 */ 218 219 struct alpha_shared_intrhand { 220 TAILQ_ENTRY(alpha_shared_intrhand) 221 ih_q; 222 struct alpha_shared_intr *ih_intrhead; 223 int (*ih_fn)(void *); 224 void *ih_arg; 225 int ih_level; 226 unsigned int ih_num; 227 }; 228 229 struct alpha_shared_intr { 230 TAILQ_HEAD(,alpha_shared_intrhand) 231 intr_q; 232 struct evcnt intr_evcnt; 233 char *intr_string; 234 void *intr_private; 235 int intr_sharetype; 236 int intr_dfltsharetype; 237 int intr_nstrays; 238 int intr_maxstrays; 239 }; 240 241 #define ALPHA_SHARED_INTR_DISABLE(asi, num) \ 242 ((asi)[num].intr_maxstrays != 0 && \ 243 (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays) 244 245 #define setsoft(x) atomic_setbits_ulong(&ssir, 1 << (x)) 246 247 struct alpha_soft_intrhand { 248 TAILQ_ENTRY(alpha_soft_intrhand) 249 sih_q; 250 struct alpha_soft_intr *sih_intrhead; 251 void (*sih_fn)(void *); 252 void *sih_arg; 253 int sih_pending; 254 }; 255 256 struct alpha_soft_intr { 257 TAILQ_HEAD(, alpha_soft_intrhand) 258 softintr_q; 259 struct evcnt softintr_evcnt; 260 struct simplelock softintr_slock; 261 unsigned long softintr_siq; 262 }; 263 264 void *softintr_establish(int, void (*)(void *), void *); 265 void softintr_disestablish(void *); 266 void softintr_init(void); 267 void softintr_dispatch(void); 268 269 #define softintr_schedule(arg) \ 270 do { \ 271 struct alpha_soft_intrhand *__sih = (arg); \ 272 struct alpha_soft_intr *__si = __sih->sih_intrhead; \ 273 int __s; \ 274 \ 275 __s = splhigh(); \ 276 simple_lock(&__si->softintr_slock); \ 277 if (__sih->sih_pending == 0) { \ 278 TAILQ_INSERT_TAIL(&__si->softintr_q, __sih, sih_q); \ 279 __sih->sih_pending = 1; \ 280 setsoft(__si->softintr_siq); \ 281 } \ 282 simple_unlock(&__si->softintr_slock); \ 283 splx(__s); \ 284 } while (0) 285 286 /* XXX For legacy software interrupts. */ 287 extern struct alpha_soft_intrhand *softnet_intrhand; 288 289 #define setsoftnet() softintr_schedule(softnet_intrhand) 290 291 struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int, unsigned int); 292 int alpha_shared_intr_dispatch(struct alpha_shared_intr *, 293 unsigned int); 294 void *alpha_shared_intr_establish(struct alpha_shared_intr *, 295 unsigned int, int, int, int (*)(void *), void *, const char *); 296 void alpha_shared_intr_disestablish(struct alpha_shared_intr *, 297 void *, const char *); 298 int alpha_shared_intr_get_sharetype(struct alpha_shared_intr *, 299 unsigned int); 300 int alpha_shared_intr_isactive(struct alpha_shared_intr *, 301 unsigned int); 302 int alpha_shared_intr_firstactive(struct alpha_shared_intr *, 303 unsigned int); 304 void alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *, 305 unsigned int, int); 306 void alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *, 307 unsigned int, int); 308 void alpha_shared_intr_reset_strays(struct alpha_shared_intr *, 309 unsigned int); 310 void alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int, 311 const char *); 312 void alpha_shared_intr_set_private(struct alpha_shared_intr *, 313 unsigned int, void *); 314 void *alpha_shared_intr_get_private(struct alpha_shared_intr *, 315 unsigned int); 316 char *alpha_shared_intr_string(struct alpha_shared_intr *, 317 unsigned int); 318 struct evcnt *alpha_shared_intr_evcnt(struct alpha_shared_intr *, 319 unsigned int); 320 321 extern struct scbvec scb_iovectab[]; 322 323 void scb_init(void); 324 void scb_set(u_long, void (*)(void *, u_long), void *); 325 u_long scb_alloc(void (*)(void *, u_long), void *); 326 void scb_free(u_long); 327 328 #define SCB_ALLOC_FAILED ((u_long) -1) 329 330 #endif /* _KERNEL */ 331 #endif /* ! _ALPHA_INTR_H_ */ 332
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