intr.h revision 1.58
1 /* $NetBSD: intr.h,v 1.58 2007/02/09 21:55:01 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1997 Christopher G. Demetriou. All rights reserved. 41 * Copyright (c) 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 #ifndef _ALPHA_INTR_H_ 68 #define _ALPHA_INTR_H_ 69 70 #include <sys/device.h> 71 #include <sys/lock.h> 72 #include <sys/queue.h> 73 74 #include <machine/atomic.h> 75 #include <machine/cpu.h> 76 77 /* 78 * The Alpha System Control Block. This is 8k long, and you get 79 * 16 bytes per vector (i.e. the vector numbers are spaced 16 80 * apart). 81 * 82 * This is sort of a "shadow" SCB -- rather than the CPU jumping 83 * to (SCBaddr + (16 * vector)), like it does on the VAX, we get 84 * a vector number in a1. We use the SCB to look up a routine/arg 85 * and jump to it. 86 * 87 * Since we use the SCB only for I/O interrupts, we make it shorter 88 * than normal, starting it at vector 0x800 (the start of the I/O 89 * interrupt vectors). 90 */ 91 #define SCB_IOVECBASE 0x0800 92 #define SCB_VECSIZE 0x0010 93 #define SCB_SIZE 0x2000 94 95 #define SCB_VECTOIDX(x) ((x) >> 4) 96 #define SCB_IDXTOVEC(x) ((x) << 4) 97 98 #define SCB_NIOVECS SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE) 99 100 struct scbvec { 101 void (*scb_func)(void *, u_long); 102 void *scb_arg; 103 }; 104 105 /* 106 * Alpha interrupts come in at one of 4 levels: 107 * 108 * software interrupt level 109 * i/o level 1 110 * i/o level 2 111 * clock level 112 * 113 * However, since we do not have any way to know which hardware 114 * level a particular i/o interrupt comes in on, we have to 115 * whittle it down to 3. 116 */ 117 118 #define IPL_NONE 0 /* no interrupt level */ 119 #define IPL_SOFT 1 /* generic software interrupts */ 120 #define IPL_SOFTCLOCK 2 /* clock software interrupts */ 121 #define IPL_SOFTNET 3 /* network software interrupts */ 122 #define IPL_SOFTSERIAL 4 /* serial software interrupts */ 123 #define IPL_BIO 5 /* block I/O interrupts */ 124 #define IPL_NET 6 /* network interrupts */ 125 #define IPL_TTY 7 /* terminal interrupts */ 126 #define IPL_LPT IPL_TTY 127 #define IPL_VM 8 /* interrupts that can alloc mem */ 128 #define IPL_CLOCK 9 /* clock interrupts */ 129 #define IPL_IPI IPL_CLOCK /* AARM, 5-2, II-B */ 130 #define IPL_STATCLOCK IPL_CLOCK 131 #define IPL_HIGH 10 /* all interrupts */ 132 #define IPL_SCHED IPL_HIGH 133 #define IPL_LOCK IPL_HIGH 134 #define IPL_SERIAL 11 /* serial interrupts */ 135 136 typedef int ipl_t; 137 typedef struct { 138 uint8_t _psl; 139 } ipl_cookie_t; 140 141 ipl_cookie_t makeiplcookie(ipl_t); 142 143 #define SI_SOFTSERIAL 0 144 #define SI_SOFTNET 1 145 #define SI_SOFTCLOCK 2 146 #define SI_SOFT 3 147 148 #define SI_NQUEUES 4 149 150 #define SI_QUEUENAMES { \ 151 "serial", \ 152 "net", \ 153 "clock", \ 154 "misc", \ 155 } 156 157 #define IST_UNUSABLE -1 /* interrupt cannot be used */ 158 #define IST_NONE 0 /* none (dummy) */ 159 #define IST_PULSE 1 /* pulsed */ 160 #define IST_EDGE 2 /* edge-triggered */ 161 #define IST_LEVEL 3 /* level-triggered */ 162 163 #ifdef _KERNEL 164 165 /* Simulated software interrupt register. */ 166 extern volatile unsigned long ssir; 167 168 /* IPL-lowering/restoring macros */ 169 void spl0(void); 170 171 static __inline void 172 splx(int s) 173 { 174 if (s == ALPHA_PSL_IPL_0 && ssir != 0) 175 spl0(); 176 else 177 alpha_pal_swpipl(s); 178 } 179 #define spllowersoftclock() ((void)alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT)) 180 181 /* IPL-raising functions/macros */ 182 static __inline int 183 _splraise(int s) 184 { 185 int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK; 186 return (s > cur ? alpha_pal_swpipl(s) : cur); 187 } 188 189 #define splraiseipl(icookie) _splraise((icookie)._psl) 190 191 #include <sys/spl.h> 192 193 /* 194 * Interprocessor interrupts. In order how we want them processed. 195 */ 196 #define ALPHA_IPI_HALT (1UL << 0) 197 #define ALPHA_IPI_MICROSET (1UL << 1) 198 #define ALPHA_IPI_SHOOTDOWN (1UL << 2) 199 #define ALPHA_IPI_IMB (1UL << 3) 200 #define ALPHA_IPI_AST (1UL << 4) 201 #define ALPHA_IPI_SYNCH_FPU (1UL << 5) 202 #define ALPHA_IPI_DISCARD_FPU (1UL << 6) 203 #define ALPHA_IPI_PAUSE (1UL << 7) 204 #define ALPHA_IPI_PMAP_REACTIVATE (1UL << 8) 205 206 #define ALPHA_NIPIS 9 /* must not exceed 64 */ 207 208 struct cpu_info; 209 struct trapframe; 210 211 void alpha_ipi_init(struct cpu_info *); 212 void alpha_ipi_process(struct cpu_info *, struct trapframe *); 213 void alpha_send_ipi(unsigned long, unsigned long); 214 void alpha_broadcast_ipi(unsigned long); 215 void alpha_multicast_ipi(unsigned long, unsigned long); 216 217 /* 218 * Alpha shared-interrupt-line common code. 219 */ 220 221 struct alpha_shared_intrhand { 222 TAILQ_ENTRY(alpha_shared_intrhand) 223 ih_q; 224 struct alpha_shared_intr *ih_intrhead; 225 int (*ih_fn)(void *); 226 void *ih_arg; 227 int ih_level; 228 unsigned int ih_num; 229 }; 230 231 struct alpha_shared_intr { 232 TAILQ_HEAD(,alpha_shared_intrhand) 233 intr_q; 234 struct evcnt intr_evcnt; 235 char *intr_string; 236 void *intr_private; 237 int intr_sharetype; 238 int intr_dfltsharetype; 239 int intr_nstrays; 240 int intr_maxstrays; 241 }; 242 243 #define ALPHA_SHARED_INTR_DISABLE(asi, num) \ 244 ((asi)[num].intr_maxstrays != 0 && \ 245 (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays) 246 247 #define setsoft(x) atomic_setbits_ulong(&ssir, 1 << (x)) 248 249 struct alpha_soft_intrhand { 250 TAILQ_ENTRY(alpha_soft_intrhand) 251 sih_q; 252 struct alpha_soft_intr *sih_intrhead; 253 void (*sih_fn)(void *); 254 void *sih_arg; 255 int sih_pending; 256 }; 257 258 struct alpha_soft_intr { 259 TAILQ_HEAD(, alpha_soft_intrhand) 260 softintr_q; 261 struct evcnt softintr_evcnt; 262 struct simplelock softintr_slock; 263 unsigned long softintr_siq; 264 }; 265 266 void *softintr_establish(int, void (*)(void *), void *); 267 void softintr_disestablish(void *); 268 void softintr_init(void); 269 void softintr_dispatch(void); 270 271 #define softintr_schedule(arg) \ 272 do { \ 273 struct alpha_soft_intrhand *__sih = (arg); \ 274 struct alpha_soft_intr *__si = __sih->sih_intrhead; \ 275 int __s; \ 276 \ 277 __s = splhigh(); \ 278 simple_lock(&__si->softintr_slock); \ 279 if (__sih->sih_pending == 0) { \ 280 TAILQ_INSERT_TAIL(&__si->softintr_q, __sih, sih_q); \ 281 __sih->sih_pending = 1; \ 282 setsoft(__si->softintr_siq); \ 283 } \ 284 simple_unlock(&__si->softintr_slock); \ 285 splx(__s); \ 286 } while (0) 287 288 /* XXX For legacy software interrupts. */ 289 extern struct alpha_soft_intrhand *softnet_intrhand; 290 291 #define setsoftnet() softintr_schedule(softnet_intrhand) 292 293 struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int, unsigned int); 294 int alpha_shared_intr_dispatch(struct alpha_shared_intr *, 295 unsigned int); 296 void *alpha_shared_intr_establish(struct alpha_shared_intr *, 297 unsigned int, int, int, int (*)(void *), void *, const char *); 298 void alpha_shared_intr_disestablish(struct alpha_shared_intr *, 299 void *, const char *); 300 int alpha_shared_intr_get_sharetype(struct alpha_shared_intr *, 301 unsigned int); 302 int alpha_shared_intr_isactive(struct alpha_shared_intr *, 303 unsigned int); 304 int alpha_shared_intr_firstactive(struct alpha_shared_intr *, 305 unsigned int); 306 void alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *, 307 unsigned int, int); 308 void alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *, 309 unsigned int, int); 310 void alpha_shared_intr_reset_strays(struct alpha_shared_intr *, 311 unsigned int); 312 void alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int, 313 const char *); 314 void alpha_shared_intr_set_private(struct alpha_shared_intr *, 315 unsigned int, void *); 316 void *alpha_shared_intr_get_private(struct alpha_shared_intr *, 317 unsigned int); 318 char *alpha_shared_intr_string(struct alpha_shared_intr *, 319 unsigned int); 320 struct evcnt *alpha_shared_intr_evcnt(struct alpha_shared_intr *, 321 unsigned int); 322 323 extern struct scbvec scb_iovectab[]; 324 325 void scb_init(void); 326 void scb_set(u_long, void (*)(void *, u_long), void *); 327 u_long scb_alloc(void (*)(void *, u_long), void *); 328 void scb_free(u_long); 329 330 #define SCB_ALLOC_FAILED ((u_long) -1) 331 332 #endif /* _KERNEL */ 333 #endif /* ! _ALPHA_INTR_H_ */ 334
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