intr.h revision 1.63
1 /* $NetBSD: intr.h,v 1.63 2008/01/04 21:47:16 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1997 Christopher G. Demetriou. All rights reserved. 41 * Copyright (c) 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 #ifndef _ALPHA_INTR_H_ 68 #define _ALPHA_INTR_H_ 69 70 #include <sys/evcnt.h> 71 72 #include <machine/atomic.h> 73 74 /* 75 * The Alpha System Control Block. This is 8k long, and you get 76 * 16 bytes per vector (i.e. the vector numbers are spaced 16 77 * apart). 78 * 79 * This is sort of a "shadow" SCB -- rather than the CPU jumping 80 * to (SCBaddr + (16 * vector)), like it does on the VAX, we get 81 * a vector number in a1. We use the SCB to look up a routine/arg 82 * and jump to it. 83 * 84 * Since we use the SCB only for I/O interrupts, we make it shorter 85 * than normal, starting it at vector 0x800 (the start of the I/O 86 * interrupt vectors). 87 */ 88 #define SCB_IOVECBASE 0x0800 89 #define SCB_VECSIZE 0x0010 90 #define SCB_SIZE 0x2000 91 92 #define SCB_VECTOIDX(x) ((x) >> 4) 93 #define SCB_IDXTOVEC(x) ((x) << 4) 94 95 #define SCB_NIOVECS SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE) 96 97 struct scbvec { 98 void (*scb_func)(void *, u_long); 99 void *scb_arg; 100 }; 101 102 /* 103 * Alpha interrupts come in at one of 4 levels: 104 * 105 * software interrupt level 106 * i/o level 1 107 * i/o level 2 108 * clock level 109 * 110 * However, since we do not have any way to know which hardware 111 * level a particular i/o interrupt comes in on, we have to 112 * whittle it down to 3. 113 */ 114 115 #define IPL_NONE 0 /* no interrupt level */ 116 #define IPL_SOFTCLOCK 1 /* generic software interrupts */ 117 #define IPL_SOFTBIO 1 /* generic software interrupts */ 118 #define IPL_SOFTNET 1 /* generic software interrupts */ 119 #define IPL_SOFTSERIAL 1 /* generic software interrupts */ 120 #define IPL_VM 2 /* interrupts that can alloc mem */ 121 #define IPL_SCHED 3 /* clock interrupts */ 122 #define IPL_HIGH 4 /* all interrupts */ 123 124 typedef int ipl_t; 125 typedef struct { 126 uint8_t _psl; 127 } ipl_cookie_t; 128 129 ipl_cookie_t makeiplcookie(ipl_t); 130 131 #define IST_UNUSABLE -1 /* interrupt cannot be used */ 132 #define IST_NONE 0 /* none (dummy) */ 133 #define IST_PULSE 1 /* pulsed */ 134 #define IST_EDGE 2 /* edge-triggered */ 135 #define IST_LEVEL 3 /* level-triggered */ 136 137 #ifdef _KERNEL 138 139 /* Simulated software interrupt register. */ 140 extern volatile unsigned long ssir; 141 142 /* IPL-lowering/restoring macros */ 143 void spl0(void); 144 145 static __inline void 146 splx(int s) 147 { 148 if (s == ALPHA_PSL_IPL_0 && ssir != 0) 149 spl0(); 150 else 151 alpha_pal_swpipl(s); 152 } 153 /* IPL-raising functions/macros */ 154 static __inline int 155 _splraise(int s) 156 { 157 int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK; 158 return (s > cur ? alpha_pal_swpipl(s) : cur); 159 } 160 161 #define splraiseipl(icookie) _splraise((icookie)._psl) 162 163 #include <sys/spl.h> 164 165 /* 166 * Interprocessor interrupts. In order how we want them processed. 167 */ 168 #define ALPHA_IPI_HALT (1UL << 0) 169 #define ALPHA_IPI_MICROSET (1UL << 1) 170 #define ALPHA_IPI_SHOOTDOWN (1UL << 2) 171 #define ALPHA_IPI_IMB (1UL << 3) 172 #define ALPHA_IPI_AST (1UL << 4) 173 #define ALPHA_IPI_SYNCH_FPU (1UL << 5) 174 #define ALPHA_IPI_DISCARD_FPU (1UL << 6) 175 #define ALPHA_IPI_PAUSE (1UL << 7) 176 #define ALPHA_IPI_PMAP_REACTIVATE (1UL << 8) 177 178 #define ALPHA_NIPIS 9 /* must not exceed 64 */ 179 180 struct cpu_info; 181 struct trapframe; 182 183 void alpha_ipi_init(struct cpu_info *); 184 void alpha_ipi_process(struct cpu_info *, struct trapframe *); 185 void alpha_send_ipi(unsigned long, unsigned long); 186 void alpha_broadcast_ipi(unsigned long); 187 void alpha_multicast_ipi(unsigned long, unsigned long); 188 189 /* 190 * Alpha shared-interrupt-line common code. 191 */ 192 193 struct alpha_shared_intrhand { 194 TAILQ_ENTRY(alpha_shared_intrhand) 195 ih_q; 196 struct alpha_shared_intr *ih_intrhead; 197 int (*ih_fn)(void *); 198 void *ih_arg; 199 int ih_level; 200 unsigned int ih_num; 201 }; 202 203 struct alpha_shared_intr { 204 TAILQ_HEAD(,alpha_shared_intrhand) 205 intr_q; 206 struct evcnt intr_evcnt; 207 char *intr_string; 208 void *intr_private; 209 int intr_sharetype; 210 int intr_dfltsharetype; 211 int intr_nstrays; 212 int intr_maxstrays; 213 }; 214 215 #define ALPHA_SHARED_INTR_DISABLE(asi, num) \ 216 ((asi)[num].intr_maxstrays != 0 && \ 217 (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays) 218 219 void softintr_dispatch(void); 220 221 struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int, unsigned int); 222 int alpha_shared_intr_dispatch(struct alpha_shared_intr *, 223 unsigned int); 224 void *alpha_shared_intr_establish(struct alpha_shared_intr *, 225 unsigned int, int, int, int (*)(void *), void *, const char *); 226 void alpha_shared_intr_disestablish(struct alpha_shared_intr *, 227 void *, const char *); 228 int alpha_shared_intr_get_sharetype(struct alpha_shared_intr *, 229 unsigned int); 230 int alpha_shared_intr_isactive(struct alpha_shared_intr *, 231 unsigned int); 232 int alpha_shared_intr_firstactive(struct alpha_shared_intr *, 233 unsigned int); 234 void alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *, 235 unsigned int, int); 236 void alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *, 237 unsigned int, int); 238 void alpha_shared_intr_reset_strays(struct alpha_shared_intr *, 239 unsigned int); 240 void alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int, 241 const char *); 242 void alpha_shared_intr_set_private(struct alpha_shared_intr *, 243 unsigned int, void *); 244 void *alpha_shared_intr_get_private(struct alpha_shared_intr *, 245 unsigned int); 246 char *alpha_shared_intr_string(struct alpha_shared_intr *, 247 unsigned int); 248 struct evcnt *alpha_shared_intr_evcnt(struct alpha_shared_intr *, 249 unsigned int); 250 251 extern struct scbvec scb_iovectab[]; 252 253 void scb_init(void); 254 void scb_set(u_long, void (*)(void *, u_long), void *, int); 255 u_long scb_alloc(void (*)(void *, u_long), void *); 256 void scb_free(u_long); 257 258 #define SCB_ALLOC_FAILED ((u_long) -1) 259 260 #endif /* _KERNEL */ 261 #endif /* ! _ALPHA_INTR_H_ */ 262
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