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intr.h revision 1.75
      1 /* $NetBSD: intr.h,v 1.75 2020/09/05 18:01:42 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2000, 2001, 2002 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * Copyright (c) 1997 Christopher G. Demetriou.  All rights reserved.
     34  * Copyright (c) 1996 Carnegie-Mellon University.
     35  * All rights reserved.
     36  *
     37  * Author: Chris G. Demetriou
     38  *
     39  * Permission to use, copy, modify and distribute this software and
     40  * its documentation is hereby granted, provided that both the copyright
     41  * notice and this permission notice appear in all copies of the
     42  * software, derivative works or modified versions, and any portions
     43  * thereof, and that both notices appear in supporting documentation.
     44  *
     45  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     46  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     47  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     48  *
     49  * Carnegie Mellon requests users of this software to return to
     50  *
     51  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     52  *  School of Computer Science
     53  *  Carnegie Mellon University
     54  *  Pittsburgh PA 15213-3890
     55  *
     56  * any improvements or extensions that they make and grant Carnegie the
     57  * rights to redistribute these changes.
     58  */
     59 
     60 #ifndef _ALPHA_INTR_H_
     61 #define _ALPHA_INTR_H_
     62 
     63 #include <sys/evcnt.h>
     64 #include <machine/cpu.h>
     65 
     66 /*
     67  * The Alpha System Control Block.  This is 8k long, and you get
     68  * 16 bytes per vector (i.e. the vector numbers are spaced 16
     69  * apart).
     70  *
     71  * This is sort of a "shadow" SCB -- rather than the CPU jumping
     72  * to (SCBaddr + (16 * vector)), like it does on the VAX, we get
     73  * a vector number in a1.  We use the SCB to look up a routine/arg
     74  * and jump to it.
     75  *
     76  * Since we use the SCB only for I/O interrupts, we make it shorter
     77  * than normal, starting it at vector 0x800 (the start of the I/O
     78  * interrupt vectors).
     79  */
     80 #define	SCB_IOVECBASE	0x0800
     81 #define	SCB_VECSIZE	0x0010
     82 #define	SCB_SIZE	0x2000
     83 
     84 #define	SCB_VECTOIDX(x)	((x) >> 4)
     85 #define	SCB_IDXTOVEC(x)	((x) << 4)
     86 
     87 #define	SCB_NIOVECS	SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE)
     88 
     89 struct scbvec {
     90 	void	(*scb_func)(void *, u_long);
     91 	void	*scb_arg;
     92 };
     93 
     94 /*
     95  * Alpha interrupts come in at one of 3 levels:
     96  *
     97  *	i/o level 1
     98  *	i/o level 2
     99  *	clock level
    100  *
    101  * However, since we do not have any way to know which hardware
    102  * level a particular i/o interrupt comes in on, we have to
    103  * whittle it down to 2.  In addition, there are 2 software interrupt
    104  * levels available to system software.
    105  */
    106 
    107 #define	IPL_NONE	ALPHA_PSL_IPL_0
    108 #define	IPL_SOFTCLOCK	ALPHA_PSL_IPL_SOFT_LO
    109 #define	IPL_SOFTBIO	ALPHA_PSL_IPL_SOFT_LO
    110 #define	IPL_SOFTNET	ALPHA_PSL_IPL_SOFT_LO	/* XXX HI */
    111 #define	IPL_SOFTSERIAL	ALPHA_PSL_IPL_SOFT_LO	/* XXX HI */
    112 #define	IPL_VM		ALPHA_PSL_IPL_IO_HI
    113 #define	IPL_SCHED	ALPHA_PSL_IPL_CLOCK
    114 #define	IPL_HIGH	ALPHA_PSL_IPL_HIGH
    115 
    116 typedef int ipl_t;
    117 typedef struct {
    118 	uint8_t _psl;
    119 } ipl_cookie_t;
    120 
    121 static inline ipl_cookie_t
    122 makeiplcookie(ipl_t ipl)
    123 {
    124 	return (ipl_cookie_t){._psl = (uint8_t)ipl};
    125 }
    126 
    127 #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
    128 #define	IST_NONE	0	/* none (dummy) */
    129 #define	IST_PULSE	1	/* pulsed */
    130 #define	IST_EDGE	2	/* edge-triggered */
    131 #define	IST_LEVEL	3	/* level-triggered */
    132 
    133 #ifdef	_KERNEL
    134 
    135 /* IPL-lowering/restoring macros */
    136 void	spllower(int);
    137 
    138 #define	splx(s)		spllower(s)
    139 #define	spl0()		spllower(ALPHA_PSL_IPL_0)
    140 
    141 /* IPL-raising functions/macros */
    142 static __inline int
    143 _splraise(int s)
    144 {
    145 	int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK;
    146 	return (s > cur ? (int)alpha_pal_swpipl(s) : cur);
    147 }
    148 
    149 #define	splraiseipl(icookie)	_splraise((icookie)._psl)
    150 
    151 #include <sys/spl.h>
    152 
    153 /*
    154  * Interprocessor interrupts.  In order how we want them processed.
    155  */
    156 #define	ALPHA_IPI_HALT			(1UL << 0)
    157 #define	ALPHA_IPI_MICROSET		(1UL << 1)
    158 #define	ALPHA_IPI_SHOOTDOWN		(1UL << 2)
    159 #define	ALPHA_IPI_AST			(1UL << 3)
    160 #define	ALPHA_IPI_PAUSE			(1UL << 4)
    161 #define	ALPHA_IPI_XCALL			(1UL << 5)
    162 #define	ALPHA_IPI_GENERIC		(1UL << 6)
    163 
    164 #define	ALPHA_NIPIS			7	/* must not exceed 64 */
    165 
    166 struct cpu_info;
    167 struct trapframe;
    168 
    169 void	alpha_ipi_init(struct cpu_info *);
    170 void	alpha_ipi_process(struct cpu_info *, struct trapframe *);
    171 void	alpha_send_ipi(unsigned long, unsigned long);
    172 void	alpha_broadcast_ipi(unsigned long);
    173 void	alpha_multicast_ipi(unsigned long, unsigned long);
    174 
    175 /*
    176  * Alpha shared-interrupt-line common code.
    177  */
    178 
    179 struct alpha_shared_intrhand {
    180 	TAILQ_ENTRY(alpha_shared_intrhand)
    181 		ih_q;
    182 	struct alpha_shared_intr *ih_intrhead;
    183 	int	(*ih_fn)(void *);
    184 	void	*ih_arg;
    185 	int	ih_level;
    186 	unsigned int ih_num;
    187 };
    188 
    189 struct alpha_shared_intr {
    190 	TAILQ_HEAD(,alpha_shared_intrhand)
    191 		intr_q;
    192 	struct evcnt intr_evcnt;
    193 	char	*intr_string;
    194 	void	*intr_private;
    195 	int	intr_sharetype;
    196 	int	intr_dfltsharetype;
    197 	int	intr_nstrays;
    198 	int	intr_maxstrays;
    199 };
    200 
    201 #define	ALPHA_SHARED_INTR_DISABLE(asi, num)				\
    202 	((asi)[num].intr_maxstrays != 0 &&				\
    203 	 (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays)
    204 
    205 void	softintr_dispatch(void);
    206 
    207 struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int, unsigned int);
    208 int	alpha_shared_intr_dispatch(struct alpha_shared_intr *,
    209 	    unsigned int);
    210 void	*alpha_shared_intr_establish(struct alpha_shared_intr *,
    211 	    unsigned int, int, int, int (*)(void *), void *, const char *);
    212 void	alpha_shared_intr_disestablish(struct alpha_shared_intr *,
    213 	    void *, const char *);
    214 int	alpha_shared_intr_get_sharetype(struct alpha_shared_intr *,
    215 	    unsigned int);
    216 int	alpha_shared_intr_isactive(struct alpha_shared_intr *,
    217 	    unsigned int);
    218 int	alpha_shared_intr_firstactive(struct alpha_shared_intr *,
    219 	    unsigned int);
    220 void	alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *,
    221 	    unsigned int, int);
    222 void	alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *,
    223 	    unsigned int, int);
    224 void	alpha_shared_intr_reset_strays(struct alpha_shared_intr *,
    225 	    unsigned int);
    226 void	alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int,
    227 	    const char *);
    228 void	alpha_shared_intr_set_private(struct alpha_shared_intr *,
    229 	    unsigned int, void *);
    230 void	*alpha_shared_intr_get_private(struct alpha_shared_intr *,
    231 	    unsigned int);
    232 char	*alpha_shared_intr_string(struct alpha_shared_intr *,
    233 	    unsigned int);
    234 struct evcnt *alpha_shared_intr_evcnt(struct alpha_shared_intr *,
    235 	    unsigned int);
    236 
    237 extern struct scbvec scb_iovectab[];
    238 
    239 void	scb_init(void);
    240 void	scb_set(u_long, void (*)(void *, u_long), void *, int);
    241 u_long	scb_alloc(void (*)(void *, u_long), void *);
    242 void	scb_free(u_long);
    243 
    244 #define	SCB_ALLOC_FAILED	((u_long) -1)
    245 
    246 #endif /* _KERNEL */
    247 #endif /* ! _ALPHA_INTR_H_ */
    248