intr.h revision 1.8 1 /* $NetBSD: intr.h,v 1.8 1997/06/05 17:31:16 cgd Exp $ */
2
3 /*
4 * Copyright (c) 1997 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1996 Carnegie-Mellon University.
6 * All rights reserved.
7 *
8 * Author: Chris G. Demetriou
9 *
10 * Permission to use, copy, modify and distribute this software and
11 * its documentation is hereby granted, provided that both the copyright
12 * notice and this permission notice appear in all copies of the
13 * software, derivative works or modified versions, and any portions
14 * thereof, and that both notices appear in supporting documentation.
15 *
16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19 *
20 * Carnegie Mellon requests users of this software to return to
21 *
22 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
23 * School of Computer Science
24 * Carnegie Mellon University
25 * Pittsburgh PA 15213-3890
26 *
27 * any improvements or extensions that they make and grant Carnegie the
28 * rights to redistribute these changes.
29 */
30
31 #ifndef _ALPHA_INTR_H_
32 #define _ALPHA_INTR_H_
33
34 #include <sys/queue.h>
35
36 #define IPL_NONE 0 /* disable only this interrupt */
37 #define IPL_BIO 1 /* disable block I/O interrupts */
38 #define IPL_NET 2 /* disable network interrupts */
39 #define IPL_TTY 3 /* disable terminal interrupts */
40 #define IPL_CLOCK 4 /* disable clock interrupts */
41 #define IPL_HIGH 5 /* disable all interrupts */
42
43 #define IST_UNUSABLE -1 /* interrupt cannot be used */
44 #define IST_NONE 0 /* none (dummy) */
45 #define IST_PULSE 1 /* pulsed */
46 #define IST_EDGE 2 /* edge-triggered */
47 #define IST_LEVEL 3 /* level-triggered */
48
49 /* IPL-lowering/restoring macros */
50 #define splx(s) \
51 ((s) == ALPHA_PSL_IPL_0 ? spl0() : alpha_pal_swpipl(s))
52 #define splsoft() alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT)
53 #define splsoftclock() splsoft()
54 #define splsoftnet() splsoft()
55
56 /* IPL-raising functions/macros */
57 static __inline int
58 _splraise(s)
59 int s;
60 {
61 int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK;
62 return (a > cur ? alpha_pal_swpipl(a) : cur);
63 }
64 #define splnet() _splraise(ALPHA_PSL_IPL_IO)
65 #define splbio() _splraise(ALPHA_PSL_IPL_IO)
66 #define splimp() _splraise(ALPHA_PSL_IPL_IO)
67 #define spltty() _splraise(ALPHA_PSL_IPL_IO)
68 #define splclock() _splraise(ALPHA_PSL_IPL_CLOCK)
69 #define splstatclock() _splraise(ALPHA_PSL_IPL_CLOCK)
70 #define splhigh() _splraise(ALPHA_PSL_IPL_HIGH)
71
72 /*
73 * simulated software interrupt register
74 */
75 extern u_int64_t ssir;
76
77 #define SIR_NET 0x1
78 #define SIR_CLOCK 0x2
79
80 #define setsoftnet() ssir |= SIR_NET
81 #define setsoftclock() ssir |= SIR_CLOCK
82
83 /*
84 * Alpha shared-interrupt-line common code.
85 */
86
87 struct alpha_shared_intrhand {
88 TAILQ_ENTRY(alpha_shared_intrhand)
89 ih_q;
90 int (*ih_fn) __P((void *));
91 void *ih_arg;
92 int ih_level;
93 };
94
95 struct alpha_shared_intr {
96 TAILQ_HEAD(,alpha_shared_intrhand)
97 intr_q;
98 int intr_sharetype;
99 int intr_dfltsharetype;
100 int intr_nstrays;
101 int intr_maxstrays;
102 };
103
104 struct alpha_shared_intr *alpha_shared_intr_alloc __P((unsigned int));
105 int alpha_shared_intr_dispatch __P((struct alpha_shared_intr *,
106 unsigned int));
107 void *alpha_shared_intr_establish __P((struct alpha_shared_intr *,
108 unsigned int, int, int, int (*)(void *), void *, const char *));
109 int alpha_shared_intr_get_sharetype __P((struct alpha_shared_intr *,
110 unsigned int));
111 int alpha_shared_intr_isactive __P((struct alpha_shared_intr *,
112 unsigned int));
113 void alpha_shared_intr_set_dfltsharetype __P((struct alpha_shared_intr *,
114 unsigned int, int));
115 void alpha_shared_intr_set_maxstrays __P((struct alpha_shared_intr *,
116 unsigned int, int));
117 void alpha_shared_intr_stray __P((struct alpha_shared_intr *, unsigned int,
118 const char *));
119
120 #endif
121