lock.h revision 1.18
1/* $NetBSD: lock.h,v 1.18 2003/06/28 08:42:41 he Exp $ */
2
3/*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *	This product includes software developed by the NetBSD
22 *	Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 *    contributors may be used to endorse or promote products derived
25 *    from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40/*
41 * Machine-dependent spin lock operations.
42 */
43
44#ifndef _ALPHA_LOCK_H_
45#define	_ALPHA_LOCK_H_
46
47#ifdef _KERNEL_OPT
48#include "opt_multiprocessor.h"
49#endif
50
51typedef	__volatile int		__cpu_simple_lock_t;
52
53#define	__SIMPLELOCK_LOCKED	1
54#define	__SIMPLELOCK_UNLOCKED	0
55
56static __inline void
57__cpu_simple_lock_init(__cpu_simple_lock_t *alp)
58{
59
60	__asm __volatile(
61		"# BEGIN __cpu_simple_lock_init\n"
62		"	stl	$31, %0		\n"
63		"	mb			\n"
64		"	# END __cpu_simple_lock_init"
65		: "=m" (*alp));
66}
67
68static __inline void
69__cpu_simple_lock(__cpu_simple_lock_t *alp)
70{
71	unsigned long t0;
72
73	/*
74	 * Note, if we detect that the lock is held when
75	 * we do the initial load-locked, we spin using
76	 * a non-locked load to save the coherency logic
77	 * some work.
78	 */
79
80	__asm __volatile(
81		"# BEGIN __cpu_simple_lock\n"
82		"1:	ldl_l	%0, %3		\n"
83		"	bne	%0, 2f		\n"
84		"	bis	$31, %2, %0	\n"
85		"	stl_c	%0, %1		\n"
86		"	beq	%0, 3f		\n"
87		"	mb			\n"
88		"	br	4f		\n"
89		"2:	ldl	%0, %3		\n"
90		"	beq	%0, 1b		\n"
91		"	br	2b		\n"
92		"3:	br	1b		\n"
93		"4:				\n"
94		"	# END __cpu_simple_lock\n"
95		: "=&r" (t0), "=m" (*alp)
96		: "i" (__SIMPLELOCK_LOCKED), "m" (*alp)
97		: "memory");
98}
99
100static __inline int
101__cpu_simple_lock_try(__cpu_simple_lock_t *alp)
102{
103	unsigned long t0, v0;
104
105	__asm __volatile(
106		"# BEGIN __cpu_simple_lock_try\n"
107		"1:	ldl_l	%0, %4		\n"
108		"	bne	%0, 2f		\n"
109		"	bis	$31, %3, %0	\n"
110		"	stl_c	%0, %2		\n"
111		"	beq	%0, 3f		\n"
112		"	mb			\n"
113		"	bis	$31, 1, %1	\n"
114		"	br	4f		\n"
115		"2:	bis	$31, $31, %1	\n"
116		"	br	4f		\n"
117		"3:	br	1b		\n"
118		"4:				\n"
119		"	# END __cpu_simple_lock_try"
120		: "=&r" (t0), "=r" (v0), "=m" (*alp)
121		: "i" (__SIMPLELOCK_LOCKED), "m" (*alp)
122		: "memory");
123
124	return (v0 != 0);
125}
126
127static __inline void
128__cpu_simple_unlock(__cpu_simple_lock_t *alp)
129{
130
131	__asm __volatile(
132		"# BEGIN __cpu_simple_unlock\n"
133		"	mb			\n"
134		"	stl	$31, %0		\n"
135		"	# END __cpu_simple_unlock"
136		: "=m" (*alp));
137}
138
139#if defined(MULTIPROCESSOR)
140/*
141 * On the Alpha, interprocessor interrupts come in at device priority
142 * level.  This can cause some problems while waiting for r/w spinlocks
143 * from a high'ish priority level: IPIs that come in will not be processed.
144 * This can lead to deadlock.
145 *
146 * This hook allows IPIs to be processed while a spinlock's interlock
147 * is released.
148 */
149#define	SPINLOCK_SPIN_HOOK						\
150do {									\
151	struct cpu_info *__ci = curcpu();				\
152	int __s;							\
153									\
154	if (__ci->ci_ipis != 0) {					\
155		/* printf("CPU %lu has IPIs pending\n",			\
156		    __ci->ci_cpuid); */					\
157		__s = splipi();						\
158		alpha_ipi_process(__ci, NULL);				\
159		splx(__s);						\
160	}								\
161} while (0)
162#endif /* MULTIPROCESSOR */
163
164#endif /* _ALPHA_LOCK_H_ */
165