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      1  1.8     matt /* $NetBSD: logout.h,v 1.8 2012/02/06 02:14:13 matt Exp $ */
      2  1.1   mjacob 
      3  1.1   mjacob /*
      4  1.1   mjacob  * Copyright (c) 1998 by Matthew Jacob
      5  1.1   mjacob  * NASA AMES Research Center.
      6  1.1   mjacob  * All rights reserved.
      7  1.1   mjacob  *
      8  1.1   mjacob  * Redistribution and use in source and binary forms, with or without
      9  1.1   mjacob  * modification, are permitted provided that the following conditions
     10  1.1   mjacob  * are met:
     11  1.1   mjacob  * 1. Redistributions of source code must retain the above copyright
     12  1.1   mjacob  *    notice immediately at the beginning of the file, without modification,
     13  1.1   mjacob  *    this list of conditions, and the following disclaimer.
     14  1.1   mjacob  * 2. Redistributions in binary form must reproduce the above copyright
     15  1.1   mjacob  *    notice, this list of conditions and the following disclaimer in the
     16  1.1   mjacob  *    documentation and/or other materials provided with the distribution.
     17  1.1   mjacob  * 3. The name of the author may not be used to endorse or promote products
     18  1.1   mjacob  *    derived from this software without specific prior written permission.
     19  1.1   mjacob  *
     20  1.1   mjacob  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     21  1.1   mjacob  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     22  1.1   mjacob  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     23  1.1   mjacob  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     24  1.1   mjacob  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     25  1.1   mjacob  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     26  1.1   mjacob  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     27  1.1   mjacob  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     28  1.1   mjacob  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29  1.1   mjacob  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     30  1.1   mjacob  * SUCH DAMAGE.
     31  1.1   mjacob  */
     32  1.1   mjacob 
     33  1.1   mjacob /*
     34  1.4      wiz  * Various Alpha OSF/1 PAL Logout error definitions.
     35  1.1   mjacob  */
     36  1.3  nathanw 
     37  1.3  nathanw /*
     38  1.3  nathanw  * Information gathered from: DEC documentation
     39  1.3  nathanw  */
     40  1.3  nathanw 
     41  1.3  nathanw /*
     42  1.8     matt  * Avanti (AlphaStation 200 and 400) Specific PALcode Exception Logout
     43  1.3  nathanw  * Area Definitions
     44  1.3  nathanw  */
     45  1.3  nathanw 
     46  1.3  nathanw /*
     47  1.3  nathanw  * Avanti Specific common logout frame header.
     48  1.3  nathanw  * *Almost* identical to the generic logout header listed in alpha_cpu.h.
     49  1.3  nathanw  */
     50  1.3  nathanw 
     51  1.3  nathanw typedef struct {
     52  1.3  nathanw 	unsigned int	la_frame_size;		/* frame size */
     53  1.3  nathanw 	unsigned int	la_flags;		/* flags; see alpha_cpu.h */
     54  1.5      wiz 	unsigned int	la_cpu_offset;		/* offset to CPU area */
     55  1.3  nathanw 	unsigned int	la_system_offset;	/* offset to system area */
     56  1.3  nathanw 	unsigned long	mcheck_code;		/* machine check code */
     57  1.3  nathanw } mc_hdr_avanti;
     58  1.3  nathanw 
     59  1.3  nathanw /* Machine Check Codes */
     60  1.3  nathanw 
     61  1.3  nathanw /* SCB 660 Fatal Machine Checks */
     62  1.3  nathanw #define AVANTI_RETRY_TIMEOUT		0x201L
     63  1.3  nathanw #define	AVANTI_DMA_DATA_PARITY		0x202L
     64  1.3  nathanw #define AVANTI_IO_PARITY		0x203L
     65  1.3  nathanw #define AVANTI_TARGET_ABORT		0x204L
     66  1.3  nathanw #define AVANTI_NO_DEVICE		0x205L
     67  1.3  nathanw #define AVANTI_CORRRECTABLE_MEMORY	0x206L	/* Should never occur */
     68  1.3  nathanw #define AVANTI_UNCORRECTABLE_PCI_MEMORY	0x207L
     69  1.3  nathanw #define AVANTI_INVALID_PT_LOOKUP	0x208L
     70  1.3  nathanw #define AVANTI_MEMORY			0x209L
     71  1.3  nathanw #define AVANTI_BCACHE_TAG_ADDR_PARITY	0x20AL
     72  1.3  nathanw #define AVANTI_BCACHE_TAG_CTRL_PARITY	0x20BL
     73  1.3  nathanw #define AVANTI_NONEXISTENT_MEMORY	0x20CL
     74  1.3  nathanw #define AVANTI_IO_BUS			0x20DL
     75  1.3  nathanw #define AVANTI_BCACHE_TAG_PARITY	 0x80L
     76  1.3  nathanw #define AVANTI_BCACHE_TAG_CTRL_PARITY2   0x82L
     77  1.3  nathanw 
     78  1.3  nathanw /* SCB 670 Processor Fatal Machine Checks */
     79  1.3  nathanw #define AVANTI_HARD_ERROR		 0x84L
     80  1.3  nathanw #define AVANTI_CORRECTABLE_ECC		 0x86L
     81  1.3  nathanw #define AVANTI_NONCORRECTABLE_ECC	 0x88L
     82  1.3  nathanw #define AVANTI_UNKNOWN_ERROR		 0x8AL
     83  1.3  nathanw #define AVANTI_SOFT_ERROR		 0x8CL
     84  1.3  nathanw #define AVANTI_BUGCHECK		 	 0x8EL
     85  1.3  nathanw #define AVANTI_OS_BUGCHECK		 0x90L
     86  1.3  nathanw #define AVANTI_DCACHE_FILL_PARITY 	 0x92L
     87  1.3  nathanw #define AVANTI_ICACHE_FILL_PARITY	 0x94L
     88  1.3  nathanw 
     89  1.3  nathanw typedef struct {
     90  1.3  nathanw 	/* Registers from the CPU */
     91  1.8     matt 	uint64_t	paltemp[32];	/* PAL TEMP REGS.		*/
     92  1.8     matt 	uint64_t	exc_addr;	/* Address of excepting ins.	*/
     93  1.8     matt 	uint64_t	exc_sum;	/* Summary of arithmetic traps.	*/
     94  1.8     matt 	uint64_t	exc_mask;	/* Exception mask.		*/
     95  1.8     matt 	uint64_t	iccsr;
     96  1.8     matt 	uint64_t	pal_base;	/* Base address for PALcode.	*/
     97  1.8     matt 	uint64_t	hier;
     98  1.8     matt 	uint64_t	hirr;
     99  1.8     matt 	uint64_t	mm_csr;
    100  1.8     matt 	uint64_t	dc_stat;
    101  1.8     matt 	uint64_t	dc_addr;
    102  1.8     matt 	uint64_t	abox_ctl;
    103  1.8     matt 	uint64_t	biu_stat;	/* Bus Interface Unit Status.	*/
    104  1.8     matt 	uint64_t	biu_addr;
    105  1.8     matt 	uint64_t	biu_ctl;
    106  1.8     matt 	uint64_t	fill_syndrome;
    107  1.8     matt 	uint64_t	fill_addr;
    108  1.8     matt 	uint64_t	va;
    109  1.8     matt 	uint64_t	bc_tag;
    110  1.3  nathanw 
    111  1.3  nathanw 	/* Registers from the cache and memory controller (21071-CA) */
    112  1.8     matt 	uint64_t	coma_gcr;	/* Error and Diag. Status.	*/
    113  1.8     matt 	uint64_t	coma_edsr;
    114  1.8     matt 	uint64_t	coma_ter;
    115  1.8     matt 	uint64_t	coma_elar;
    116  1.8     matt 	uint64_t	coma_ehar;
    117  1.8     matt 	uint64_t	coma_ldlr;
    118  1.8     matt 	uint64_t	coma_ldhr;
    119  1.8     matt 	uint64_t	coma_base0;
    120  1.8     matt 	uint64_t	coma_base1;
    121  1.8     matt 	uint64_t	coma_base2;
    122  1.8     matt 	uint64_t	coma_cnfg0;
    123  1.8     matt 	uint64_t	coma_cnfg1;
    124  1.8     matt 	uint64_t	coma_cnfg2;
    125  1.3  nathanw 
    126  1.3  nathanw 	/* Registers from the PCI bridge (21071-DA) */
    127  1.8     matt 	uint64_t	epic_dcsr;	 /* Diag. Control and Status.	*/
    128  1.8     matt 	uint64_t	epic_pear;
    129  1.8     matt 	uint64_t	epic_sear;
    130  1.8     matt 	uint64_t	epic_tbr1;
    131  1.8     matt 	uint64_t	epic_tbr2;
    132  1.8     matt 	uint64_t	epic_pbr1;
    133  1.8     matt 	uint64_t	epic_pbr2;
    134  1.8     matt 	uint64_t	epic_pmr1;
    135  1.8     matt 	uint64_t	epic_pmr2;
    136  1.8     matt 	uint64_t	epic_harx1;
    137  1.8     matt 	uint64_t	epic_harx2;
    138  1.8     matt 	uint64_t	epic_pmlt;
    139  1.8     matt 	uint64_t	epic_tag0;
    140  1.8     matt 	uint64_t	epic_tag1;
    141  1.8     matt 	uint64_t	epic_tag2;
    142  1.8     matt 	uint64_t	epic_tag3;
    143  1.8     matt 	uint64_t	epic_tag4;
    144  1.8     matt 	uint64_t	epic_tag5;
    145  1.8     matt 	uint64_t	epic_tag6;
    146  1.8     matt 	uint64_t	epic_tag7;
    147  1.8     matt 	uint64_t	epic_data0;
    148  1.8     matt 	uint64_t	epic_data1;
    149  1.8     matt 	uint64_t	epic_data2;
    150  1.8     matt 	uint64_t	epic_data3;
    151  1.8     matt 	uint64_t	epic_data4;
    152  1.8     matt 	uint64_t	epic_data5;
    153  1.8     matt 	uint64_t	epic_data6;
    154  1.8     matt 	uint64_t	epic_data7;
    155  1.3  nathanw } mc_uc_avanti;
    156  1.1   mjacob 
    157  1.1   mjacob /*
    158  1.1   mjacob  * Information gathered from: OSF/1 header files.
    159  1.1   mjacob  */
    160  1.1   mjacob 
    161  1.1   mjacob 
    162  1.1   mjacob /*
    163  1.1   mjacob  * EV5 Specific OSF/1 Pal Code Exception Logout Area Definitions
    164  1.1   mjacob  * (inspired from OSF/1 Header files).
    165  1.1   mjacob  */
    166  1.1   mjacob 
    167  1.1   mjacob /*
    168  1.1   mjacob  * EV5 Specific common logout frame header.
    169  1.1   mjacob  * *Almost* identical to the generic logout header listed in alpha_cpu.h.
    170  1.1   mjacob  */
    171  1.1   mjacob 
    172  1.1   mjacob typedef struct {
    173  1.1   mjacob 	unsigned int	la_frame_size;		/* frame size */
    174  1.1   mjacob 	unsigned int	la_flags;		/* flags; see alpha_cpu.h */
    175  1.5      wiz 	unsigned int	la_cpu_offset;		/* offset to CPU area */
    176  1.1   mjacob 	unsigned int	la_system_offset;	/* offset to system area */
    177  1.1   mjacob 	unsigned long	mcheck_code;		/* machine check code */
    178  1.1   mjacob } mc_hdr_ev5;
    179  1.1   mjacob 
    180  1.1   mjacob /* Machine Check Codes */
    181  1.1   mjacob #define	EV5_CORRECTED		0x86L
    182  1.1   mjacob #define	SYSTEM_CORRECTED	0x201L
    183  1.1   mjacob 
    184  1.1   mjacob /*
    185  1.1   mjacob  * EV5 Specific Machine Check logout frame for uncorrectable errors.
    186  1.1   mjacob  * This is used to log uncorrectable errors such as double bit ECC errors.
    187  1.1   mjacob  *
    188  1.5      wiz  * This typically resides in the CPU offset area of the logout frame.
    189  1.1   mjacob  */
    190  1.1   mjacob 
    191  1.1   mjacob typedef struct {
    192  1.8     matt 	uint64_t	shadow[8];	/* Shadow reg. 8-14, 25		*/
    193  1.8     matt 	uint64_t	paltemp[24];	/* PAL TEMP REGS.		*/
    194  1.8     matt 	uint64_t	exc_addr;	/* Address of excepting ins.	*/
    195  1.8     matt 	uint64_t	exc_sum;	/* Summary of arithmetic traps.	*/
    196  1.8     matt 	uint64_t	exc_mask;	/* Exception mask.		*/
    197  1.8     matt 	uint64_t	pal_base;	/* Base address for PALcode.	*/
    198  1.8     matt 	uint64_t	isr;		/* Interrupt Status Reg.	*/
    199  1.8     matt 	uint64_t	icsr;		/* CURRENT SETUP OF EV5 IBOX	*/
    200  1.8     matt 	uint64_t	ic_perr_stat;	/*
    201  1.1   mjacob 					 * I-CACHE Reg:
    202  1.1   mjacob 					 *	<13> IBOX Timeout
    203  1.1   mjacob 					 *	<12> TAG parity
    204  1.1   mjacob 					 *	<11> Data parity
    205  1.1   mjacob 					 */
    206  1.8     matt 	uint64_t	dc_perr_stat;	/* D-CACHE error Reg:
    207  1.1   mjacob 					 * Bits set to 1:
    208  1.1   mjacob 					 *  <2> Data error in bank 0
    209  1.1   mjacob 					 *  <3> Data error in bank 1
    210  1.1   mjacob 					 *  <4> Tag error in bank 0
    211  1.1   mjacob 					 *  <5> Tag error in bank 1
    212  1.1   mjacob 					 */
    213  1.8     matt 	uint64_t	va;		/* Effective VA of fault or miss. */
    214  1.8     matt 	uint64_t	mm_stat;	/*
    215  1.8     matt 					 * Holds the reason for D-stream
    216  1.1   mjacob 					 * fault or D-cache parity errors
    217  1.1   mjacob 					 */
    218  1.8     matt 	uint64_t	sc_addr;	/*
    219  1.1   mjacob 					 * Address that was being accessed
    220  1.1   mjacob 					 * when EV5 detected Secondary cache
    221  1.1   mjacob 					 * failure.
    222  1.1   mjacob 					 */
    223  1.8     matt 	uint64_t	sc_stat;	/*
    224  1.1   mjacob 					 * Helps determine if the error was
    225  1.1   mjacob 					 * TAG/Data parity(Secondary Cache)
    226  1.1   mjacob 					 */
    227  1.8     matt 	uint64_t	bc_tag_addr;	/* Contents of EV5 BC_TAG_ADDR	  */
    228  1.8     matt 	uint64_t	ei_addr;	/*
    229  1.1   mjacob 					 * Physical address of any transfer
    230  1.1   mjacob 					 * that is logged in the EV5 EI_STAT
    231  1.1   mjacob 					 */
    232  1.8     matt 	uint64_t	fill_syndrome;	/* For correcting ECC errors.	  */
    233  1.8     matt 	uint64_t	ei_stat;	/*
    234  1.8     matt 					 * Helps identify reason of any
    235  1.1   mjacob 					 * processor uncorrectable error
    236  1.8     matt 					 * at its external interface.
    237  1.1   mjacob 					 */
    238  1.8     matt 	uint64_t	ld_lock;	/* Contents of EV5 LD_LOCK register*/
    239  1.1   mjacob } mc_uc_ev5;
    240  1.1   mjacob #define	EV5_IC_PERR_IBOXTMO	0x2000
    241  1.1   mjacob 
    242  1.1   mjacob /*
    243  1.1   mjacob  * EV5 Specific Machine Check logout frame for correctable errors.
    244  1.1   mjacob  *
    245  1.1   mjacob  * This is used to log correctable errors such as Single bit ECC errors.
    246  1.1   mjacob  */
    247  1.1   mjacob typedef struct {
    248  1.8     matt 	uint64_t	ei_addr;	/*
    249  1.1   mjacob 					 * Physical address of any transfer
    250  1.1   mjacob 					 * that is logged in the EV5 EI_STAT
    251  1.1   mjacob 					 */
    252  1.8     matt 	uint64_t	fill_syndrome;	/* For correcting ECC errors.	  */
    253  1.8     matt 	uint64_t	ei_stat;	/*
    254  1.8     matt 					 * Helps identify reason of any
    255  1.1   mjacob 					 * processor uncorrectable error
    256  1.8     matt 					 * at its external interface.
    257  1.1   mjacob 					 */
    258  1.8     matt 	uint64_t	isr;		/* Interrupt Status Reg. 	  */
    259  1.1   mjacob } mc_cc_ev5;
    260  1.1   mjacob 
    261  1.1   mjacob 
    262  1.1   mjacob #ifdef	_KERNEL
    263  1.2  thorpej extern void ev5_logout_print(mc_hdr_ev5 *, mc_uc_ev5 *);
    264  1.1   mjacob #endif
    265  1.7     hans 
    266  1.7     hans /*
    267  1.7     hans  * EV6/67 specific Machine Check logout definitions
    268  1.7     hans  * from DS20E Service Guide, EK-K8F6W-SV. A01
    269  1.7     hans  */
    270  1.7     hans 
    271  1.7     hans struct ev6_logout_area {
    272  1.7     hans 	struct alpha_logout_area la;
    273  1.7     hans 	uint32_t mchk_code;
    274  1.7     hans 	uint32_t mchk_rev;
    275  1.7     hans };
    276  1.7     hans 
    277  1.7     hans struct ev6_logout_proc {
    278  1.7     hans 	uint64_t i_stat;
    279  1.7     hans 	uint64_t dc_stat;
    280  1.7     hans 	uint64_t c_addr;
    281  1.7     hans 	uint64_t c_syndrome1;
    282  1.7     hans 	uint64_t c_syndrome0;
    283  1.7     hans 	uint64_t c_stat;
    284  1.7     hans 	uint64_t c_sts;
    285  1.7     hans 	uint64_t mm_stat;
    286  1.7     hans 	uint64_t exc_addr;
    287  1.7     hans 	uint64_t ier_cm;
    288  1.7     hans 	uint64_t isum;
    289  1.7     hans 	uint64_t _r;
    290  1.7     hans 	uint64_t pal_base;
    291  1.7     hans 	uint64_t i_ctl;
    292  1.7     hans 	uint64_t pctx;
    293  1.7     hans };
    294  1.7     hans 
    295  1.7     hans struct ev6_logout_sys {
    296  1.7     hans 	uint64_t flags;
    297  1.7     hans 	uint64_t dir;
    298  1.7     hans 	uint64_t misc;
    299  1.7     hans 	uint64_t p0_error;
    300  1.7     hans 	uint64_t p1_error;
    301  1.7     hans };
    302  1.7     hans 
    303