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pcb.h revision 1.7.2.1
      1  1.7.2.1  nathanw /* $NetBSD: pcb.h,v 1.7.2.1 2001/06/21 18:13:02 nathanw Exp $ */
      2      1.1      cgd 
      3      1.1      cgd /*
      4      1.5      cgd  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
      5      1.1      cgd  * All rights reserved.
      6      1.1      cgd  *
      7      1.1      cgd  * Author: Chris G. Demetriou
      8      1.1      cgd  *
      9      1.1      cgd  * Permission to use, copy, modify and distribute this software and
     10      1.1      cgd  * its documentation is hereby granted, provided that both the copyright
     11      1.1      cgd  * notice and this permission notice appear in all copies of the
     12      1.1      cgd  * software, derivative works or modified versions, and any portions
     13      1.1      cgd  * thereof, and that both notices appear in supporting documentation.
     14      1.1      cgd  *
     15      1.1      cgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16      1.1      cgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17      1.1      cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18      1.1      cgd  *
     19      1.1      cgd  * Carnegie Mellon requests users of this software to return to
     20      1.1      cgd  *
     21      1.1      cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22      1.1      cgd  *  School of Computer Science
     23      1.1      cgd  *  Carnegie Mellon University
     24      1.1      cgd  *  Pittsburgh PA 15213-3890
     25      1.1      cgd  *
     26      1.1      cgd  * any improvements or extensions that they make and grant Carnegie the
     27      1.1      cgd  * rights to redistribute these changes.
     28      1.1      cgd  */
     29      1.1      cgd 
     30  1.7.2.1  nathanw #include <sys/lock.h>
     31  1.7.2.1  nathanw 
     32      1.1      cgd #include <machine/frame.h>
     33      1.1      cgd #include <machine/reg.h>
     34      1.1      cgd 
     35      1.2      cgd #include <machine/alpha_cpu.h>
     36      1.1      cgd 
     37      1.1      cgd /*
     38      1.1      cgd  * PCB: process control block
     39      1.1      cgd  *
     40      1.1      cgd  * In this case, the hardware structure that is the defining element
     41      1.1      cgd  * for a process, and the additional state that must be saved by software
     42      1.1      cgd  * on a context switch.  Fields marked [HW] are mandated by hardware; fields
     43      1.1      cgd  * marked [SW] are for the software.
     44      1.1      cgd  *
     45      1.1      cgd  * It's said in the VMS PALcode section of the AARM that the pcb address
     46      1.1      cgd  * passed to the swpctx PALcode call has to be a physical address.  Not
     47      1.1      cgd  * knowing this (and trying a virtual) address proved this correct.
     48      1.1      cgd  * So we cache the physical address of the pcb in the md_proc struct.
     49      1.1      cgd  */
     50      1.1      cgd struct pcb {
     51      1.2      cgd 	struct alpha_pcb pcb_hw;		/* PALcode defined */
     52      1.3      cgd 	unsigned long	pcb_context[9];		/* s[0-6], ra, ps	[SW] */
     53      1.1      cgd 	struct fpreg	pcb_fp;			/* FP registers		[SW] */
     54      1.3      cgd 	unsigned long	pcb_onfault;		/* for copy faults	[SW] */
     55      1.3      cgd 	unsigned long	pcb_accessaddr;		/* for [fs]uswintr	[SW] */
     56      1.7  thorpej 	struct cpu_info * __volatile pcb_fpcpu;	/* CPU with our FP state[SW] */
     57  1.7.2.1  nathanw 	struct simplelock pcb_fpcpu_slock;	/* simple lock on fpcpu [SW] */
     58      1.1      cgd };
     59  1.7.2.1  nathanw 
     60  1.7.2.1  nathanw #if defined(MULTIPROCESSOR)
     61  1.7.2.1  nathanw /*
     62  1.7.2.1  nathanw  * Need to block IPIs while holding the fpcpu_slock.
     63  1.7.2.1  nathanw  */
     64  1.7.2.1  nathanw #define	FPCPU_LOCK(pcb, s)						\
     65  1.7.2.1  nathanw do {									\
     66  1.7.2.1  nathanw 	(s) = splhigh();						\
     67  1.7.2.1  nathanw 	simple_lock(&(pcb)->pcb_fpcpu_slock);				\
     68  1.7.2.1  nathanw } while (/*CONSTCOND*/0)
     69  1.7.2.1  nathanw 
     70  1.7.2.1  nathanw #define	FPCPU_UNLOCK(pcb, s)						\
     71  1.7.2.1  nathanw do {									\
     72  1.7.2.1  nathanw 	simple_unlock(&(pcb)->pcb_fpcpu_slock);				\
     73  1.7.2.1  nathanw 	splx((s));							\
     74  1.7.2.1  nathanw } while (/*CONSTCOND*/0)
     75  1.7.2.1  nathanw #else
     76  1.7.2.1  nathanw #define	FPCPU_LOCK(pcb, s)	simple_lock(&(pcb)->pcb_fpcpu_slock)
     77  1.7.2.1  nathanw #define	FPCPU_UNLOCK(pcb, s)	simple_unlock(&(pcb)->pcb_fpcpu_slock)
     78  1.7.2.1  nathanw #endif /* MULTIPROCESSOR */
     79      1.1      cgd 
     80      1.1      cgd /*
     81      1.1      cgd  * The pcb is augmented with machine-dependent additional data for
     82      1.1      cgd  * core dumps. For the Alpha, that's a trap frame and the floating
     83      1.1      cgd  * point registers.
     84      1.1      cgd  */
     85      1.1      cgd struct md_coredump {
     86      1.1      cgd 	struct	trapframe md_tf;
     87      1.4      cgd 	struct	fpreg md_fpstate;
     88      1.1      cgd };
     89