xref: /src/sys/arch/alpha/include/pcb.h

/* $NetBSD: pcb.h,v 1.8 2001/04/20 00:10:18 thorpej Exp $ */

/*
 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#include <sys/lock.h>

#include <machine/frame.h>
#include <machine/reg.h>

#include <machine/alpha_cpu.h>

/*
 * PCB: process control block
 *
 * In this case, the hardware structure that is the defining element
 * for a process, and the additional state that must be saved by software
 * on a context switch.  Fields marked [HW] are mandated by hardware; fields
 * marked [SW] are for the software.
 *
 * It's said in the VMS PALcode section of the AARM that the pcb address
 * passed to the swpctx PALcode call has to be a physical address.  Not
 * knowing this (and trying a virtual) address proved this correct.
 * So we cache the physical address of the pcb in the md_proc struct.
 */
struct pcb {
	struct alpha_pcb pcb_hw;		/* PALcode defined */
	unsigned long	pcb_context[9];		/* s[0-6], ra, ps	[SW] */
	struct fpreg	pcb_fp;			/* FP registers		[SW] */
	unsigned long	pcb_onfault;		/* for copy faults	[SW] */
	unsigned long	pcb_accessaddr;		/* for [fs]uswintr	[SW] */
	struct cpu_info * __volatile pcb_fpcpu;	/* CPU with our FP state[SW] */
	struct simplelock pcb_fpcpu_slock;	/* simple lock on fpcpu [SW] */
};

#if defined(MULTIPROCESSOR)
/*
 * Need to block IPIs while holding the fpcpu_slock.
 */
#define	FPCPU_LOCK(pcb, s)						\
do {									\
	(s) = splhigh();						\
	simple_lock(&(pcb)->pcb_fpcpu_slock);				\
} while (/*CONSTCOND*/0)

#define	FPCPU_UNLOCK(pcb, s)						\
do {									\
	simple_unlock(&(pcb)->pcb_fpcpu_slock);				\
	splx((s));							\
} while (/*CONSTCOND*/0)
#else
#define	FPCPU_LOCK(pcb, s)	simple_lock(&(pcb)->pcb_fpcpu_slock)
#define	FPCPU_UNLOCK(pcb, s)	simple_unlock(&(pcb)->pcb_fpcpu_slock)
#endif /* MULTIPROCESSOR */

/*
 * The pcb is augmented with machine-dependent additional data for
 * core dumps. For the Alpha, that's a trap frame and the floating
 * point registers.
 */
struct md_coredump {
	struct	trapframe md_tf;
	struct	fpreg md_fpstate;
};