pcb.h revision 1.9 1 1.9 simonb /* $NetBSD: pcb.h,v 1.9 2002/11/30 01:37:29 simonb Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.5 cgd * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.1 cgd
30 1.9 simonb #ifndef _ALPHA_PCB_H_
31 1.9 simonb #define _ALPHA_PCB_H_
32 1.9 simonb
33 1.8 thorpej #include <sys/lock.h>
34 1.8 thorpej
35 1.1 cgd #include <machine/frame.h>
36 1.1 cgd #include <machine/reg.h>
37 1.1 cgd
38 1.2 cgd #include <machine/alpha_cpu.h>
39 1.1 cgd
40 1.1 cgd /*
41 1.1 cgd * PCB: process control block
42 1.1 cgd *
43 1.1 cgd * In this case, the hardware structure that is the defining element
44 1.1 cgd * for a process, and the additional state that must be saved by software
45 1.1 cgd * on a context switch. Fields marked [HW] are mandated by hardware; fields
46 1.1 cgd * marked [SW] are for the software.
47 1.1 cgd *
48 1.1 cgd * It's said in the VMS PALcode section of the AARM that the pcb address
49 1.1 cgd * passed to the swpctx PALcode call has to be a physical address. Not
50 1.1 cgd * knowing this (and trying a virtual) address proved this correct.
51 1.1 cgd * So we cache the physical address of the pcb in the md_proc struct.
52 1.1 cgd */
53 1.1 cgd struct pcb {
54 1.2 cgd struct alpha_pcb pcb_hw; /* PALcode defined */
55 1.3 cgd unsigned long pcb_context[9]; /* s[0-6], ra, ps [SW] */
56 1.1 cgd struct fpreg pcb_fp; /* FP registers [SW] */
57 1.3 cgd unsigned long pcb_onfault; /* for copy faults [SW] */
58 1.3 cgd unsigned long pcb_accessaddr; /* for [fs]uswintr [SW] */
59 1.7 thorpej struct cpu_info * __volatile pcb_fpcpu; /* CPU with our FP state[SW] */
60 1.8 thorpej struct simplelock pcb_fpcpu_slock; /* simple lock on fpcpu [SW] */
61 1.1 cgd };
62 1.8 thorpej
63 1.8 thorpej #if defined(MULTIPROCESSOR)
64 1.8 thorpej /*
65 1.8 thorpej * Need to block IPIs while holding the fpcpu_slock.
66 1.8 thorpej */
67 1.8 thorpej #define FPCPU_LOCK(pcb, s) \
68 1.8 thorpej do { \
69 1.8 thorpej (s) = splhigh(); \
70 1.8 thorpej simple_lock(&(pcb)->pcb_fpcpu_slock); \
71 1.8 thorpej } while (/*CONSTCOND*/0)
72 1.8 thorpej
73 1.8 thorpej #define FPCPU_UNLOCK(pcb, s) \
74 1.8 thorpej do { \
75 1.8 thorpej simple_unlock(&(pcb)->pcb_fpcpu_slock); \
76 1.8 thorpej splx((s)); \
77 1.8 thorpej } while (/*CONSTCOND*/0)
78 1.8 thorpej #else
79 1.8 thorpej #define FPCPU_LOCK(pcb, s) simple_lock(&(pcb)->pcb_fpcpu_slock)
80 1.8 thorpej #define FPCPU_UNLOCK(pcb, s) simple_unlock(&(pcb)->pcb_fpcpu_slock)
81 1.8 thorpej #endif /* MULTIPROCESSOR */
82 1.1 cgd
83 1.1 cgd /*
84 1.1 cgd * The pcb is augmented with machine-dependent additional data for
85 1.1 cgd * core dumps. For the Alpha, that's a trap frame and the floating
86 1.1 cgd * point registers.
87 1.1 cgd */
88 1.1 cgd struct md_coredump {
89 1.1 cgd struct trapframe md_tf;
90 1.4 cgd struct fpreg md_fpstate;
91 1.1 cgd };
92 1.9 simonb #endif /* _ALPHA_PCB_H_ */
93