pmap.h revision 1.93
1 /* $NetBSD: pmap.h,v 1.93 2021/05/30 06:41:19 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2001, 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center and by Chris G. Demetriou. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1991, 1993 35 * The Regents of the University of California. All rights reserved. 36 * 37 * This code is derived from software contributed to Berkeley by 38 * the Systems Programming Group of the University of Utah Computer 39 * Science Department. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. Neither the name of the University nor the names of its contributors 50 * may be used to endorse or promote products derived from this software 51 * without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * @(#)pmap.h 8.1 (Berkeley) 6/10/93 66 */ 67 68 /* 69 * Copyright (c) 1987 Carnegie-Mellon University 70 * 71 * This code is derived from software contributed to Berkeley by 72 * the Systems Programming Group of the University of Utah Computer 73 * Science Department. 74 * 75 * Redistribution and use in source and binary forms, with or without 76 * modification, are permitted provided that the following conditions 77 * are met: 78 * 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 80 * 2. Redistributions in binary form must reproduce the above copyright 81 * notice, this list of conditions and the following disclaimer in the 82 * documentation and/or other materials provided with the distribution. 83 * 3. All advertising materials mentioning features or use of this software 84 * must display the following acknowledgement: 85 * This product includes software developed by the University of 86 * California, Berkeley and its contributors. 87 * 4. Neither the name of the University nor the names of its contributors 88 * may be used to endorse or promote products derived from this software 89 * without specific prior written permission. 90 * 91 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 92 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 93 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 94 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 95 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 96 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 97 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 98 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 99 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 100 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 101 * SUCH DAMAGE. 102 * 103 * @(#)pmap.h 8.1 (Berkeley) 6/10/93 104 */ 105 106 #ifndef _PMAP_MACHINE_ 107 #define _PMAP_MACHINE_ 108 109 #if defined(_KERNEL_OPT) 110 #include "opt_multiprocessor.h" 111 #endif 112 113 #include <sys/mutex.h> 114 #include <sys/queue.h> 115 116 #include <machine/pte.h> 117 118 /* 119 * Machine-dependent virtual memory state. 120 * 121 * If we ever support processor numbers higher than 63, we'll have to 122 * rethink the CPU mask. 123 * 124 * Note pm_asn and pm_asngen are arrays allocated in pmap_create(). 125 * Their size is based on the PCS count from the HWRPB, and indexed 126 * by processor ID (from `whami'). This is all padded to COHERENCY_UNIT 127 * to avoid false sharing. 128 * 129 * The kernel pmap is a special case; since the kernel uses only ASM 130 * mappings and uses a reserved ASN to keep the TLB clean, we don't 131 * allocate any ASN info for the kernel pmap at all. 132 * arrays which hold enough for ALPHA_MAXPROCS. 133 */ 134 135 LIST_HEAD(pmap_pagelist, vm_page); 136 137 struct pmap_percpu { 138 unsigned int pmc_asn; /* address space number */ 139 unsigned int pmc_pad0; 140 unsigned long pmc_asngen; /* ASN generation number */ 141 unsigned int pmc_needisync; /* CPU needes isync */ 142 unsigned int pmc_pad1; 143 pt_entry_t *pmc_lev1map; /* level 1 map */ 144 unsigned long pmc_padN[(COHERENCY_UNIT / 8) - 4]; 145 }; 146 147 struct pmap { /* pmaps are aligned to COHERENCY_UNIT boundaries */ 148 /* pmaps are locked by hashed mutexes */ 149 unsigned long pm_cpus; /* [ 0] CPUs using pmap */ 150 struct pmap_statistics pm_stats; /* [ 8] statistics */ 151 unsigned int pm_count; /* [24] reference count */ 152 unsigned int __pm_spare0; /* [28] spare field */ 153 struct pmap_pagelist pm_ptpages; /* [32] list of PT pages */ 154 unsigned long __pm_spare1; /* [40] spare field */ 155 TAILQ_ENTRY(pmap) pm_list; /* [48] list of all pmaps */ 156 /* -- COHERENCY_UNIT boundary -- */ 157 struct pmap_percpu pm_percpu[]; /* [64] per-CPU data */ 158 /* variable length */ 159 }; 160 161 #define PMAP_SIZEOF(x) \ 162 (ALIGN(offsetof(struct pmap, pm_percpu[(x)]))) 163 164 #define PMAP_ASN_KERNEL 0 /* kernel-reserved ASN */ 165 #define PMAP_ASN_FIRST_USER 1 /* first user ASN */ 166 #define PMAP_ASNGEN_INVALID 0 /* reserved (invalid) ASN generation */ 167 #define PMAP_ASNGEN_INITIAL 1 /* first valid generatation */ 168 169 /* 170 * For each struct vm_page, there is a list of all currently valid virtual 171 * mappings of that page. An entry is a pv_entry_t, the list is pv_table. 172 */ 173 typedef struct pv_entry { 174 struct pv_entry *pv_next; /* next pv_entry on list */ 175 struct pmap *pv_pmap; /* pmap where mapping lies */ 176 vaddr_t pv_va; /* virtual address for mapping */ 177 pt_entry_t *pv_pte; /* PTE that maps the VA */ 178 } *pv_entry_t; 179 180 /* attrs in pvh_listx */ 181 #define PGA_MODIFIED 0x01UL /* modified */ 182 #define PGA_REFERENCED 0x02UL /* referenced */ 183 #define PGA_ATTRS (PGA_MODIFIED | PGA_REFERENCED) 184 185 /* pvh_usage */ 186 #define PGU_NORMAL 0 /* free or normal use */ 187 #define PGU_PVENT 1 /* PV entries */ 188 #define PGU_L1PT 2 /* level 1 page table */ 189 #define PGU_L2PT 3 /* level 2 page table */ 190 #define PGU_L3PT 4 /* level 3 page table */ 191 192 #ifdef _KERNEL 193 194 #include <sys/atomic.h> 195 196 struct cpu_info; 197 struct trapframe; 198 199 void pmap_init_cpu(struct cpu_info *); 200 #if defined(MULTIPROCESSOR) 201 void pmap_tlb_shootdown_ipi(struct cpu_info *, struct trapframe *); 202 #endif /* MULTIPROCESSOR */ 203 204 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 205 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 206 207 #define pmap_copy(dp, sp, da, l, sa) /* nothing */ 208 #define pmap_update(pmap) /* nothing (yet) */ 209 210 static __inline bool 211 pmap_remove_all(struct pmap *pmap) 212 { 213 /* Nothing. */ 214 return false; 215 } 216 217 #define pmap_is_referenced(pg) \ 218 (((pg)->mdpage.pvh_listx & PGA_REFERENCED) != 0) 219 #define pmap_is_modified(pg) \ 220 (((pg)->mdpage.pvh_listx & PGA_MODIFIED) != 0) 221 222 #define PMAP_STEAL_MEMORY /* enable pmap_steal_memory() */ 223 #define PMAP_GROWKERNEL /* enable pmap_growkernel() */ 224 225 #define PMAP_DIRECT 226 #define PMAP_DIRECT_MAP(pa) ALPHA_PHYS_TO_K0SEG((pa)) 227 #define PMAP_DIRECT_UNMAP(va) ALPHA_K0SEG_TO_PHYS((va)) 228 229 static __inline int 230 pmap_direct_process(paddr_t pa, voff_t pgoff, size_t len, 231 int (*process)(void *, size_t, void *), void *arg) 232 { 233 vaddr_t va = PMAP_DIRECT_MAP(pa); 234 235 return process((void *)(va + pgoff), len, arg); 236 } 237 238 /* 239 * Alternate mapping hooks for pool pages. Avoids thrashing the TLB. 240 */ 241 #define PMAP_MAP_POOLPAGE(pa) PMAP_DIRECT_MAP(pa) 242 #define PMAP_UNMAP_POOLPAGE(va) PMAP_DIRECT_UNMAP(va) 243 244 /* 245 * Other hooks for the pool allocator. 246 */ 247 #define POOL_VTOPHYS(va) ALPHA_K0SEG_TO_PHYS((vaddr_t) (va)) 248 249 bool pmap_pageidlezero(paddr_t); 250 #define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa)) 251 252 paddr_t vtophys(vaddr_t); 253 254 /* Machine-specific functions. */ 255 void pmap_bootstrap(paddr_t, u_int, u_long); 256 int pmap_emulate_reference(struct lwp *, vaddr_t, int, int); 257 258 #define pmap_pte_pa(pte) (PG_PFNUM(*(pte)) << PGSHIFT) 259 #define pmap_pte_prot(pte) (*(pte) & PG_PROT) 260 #define pmap_pte_w(pte) (*(pte) & PG_WIRED) 261 #define pmap_pte_v(pte) (*(pte) & PG_V) 262 #define pmap_pte_pv(pte) (*(pte) & PG_PVLIST) 263 #define pmap_pte_asm(pte) (*(pte) & PG_ASM) 264 #define pmap_pte_exec(pte) (*(pte) & PG_EXEC) 265 266 #define pmap_pte_set_w(pte, v) \ 267 do { \ 268 if (v) \ 269 *(pte) |= PG_WIRED; \ 270 else \ 271 *(pte) &= ~PG_WIRED; \ 272 } while (0) 273 274 #define pmap_pte_w_chg(pte, nw) ((nw) ^ pmap_pte_w(pte)) 275 276 #define pmap_pte_set_prot(pte, np) \ 277 do { \ 278 *(pte) &= ~PG_PROT; \ 279 *(pte) |= (np); \ 280 } while (0) 281 282 #define pmap_pte_prot_chg(pte, np) ((np) ^ pmap_pte_prot(pte)) 283 284 static __inline pt_entry_t * 285 pmap_lev1map(pmap_t pmap) 286 { 287 if (__predict_false(pmap == pmap_kernel())) { 288 return kernel_lev1map; 289 } 290 /* 291 * We're just reading a per-CPU field that's the same on 292 * all CPUs, so don't bother disabling preemption around 293 * this. 294 */ 295 return pmap->pm_percpu[cpu_number()].pmc_lev1map; 296 } 297 298 static __inline pt_entry_t * 299 pmap_l1pte(pt_entry_t *lev1map, vaddr_t v) 300 { 301 KASSERT(lev1map != NULL); 302 return &lev1map[l1pte_index(v)]; 303 } 304 305 static __inline pt_entry_t * 306 pmap_l2pte(pt_entry_t *lev1map, vaddr_t v, pt_entry_t *l1pte) 307 { 308 pt_entry_t *lev2map; 309 310 if (l1pte == NULL) { 311 l1pte = pmap_l1pte(lev1map, v); 312 if (pmap_pte_v(l1pte) == 0) 313 return NULL; 314 } 315 316 lev2map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l1pte)); 317 return &lev2map[l2pte_index(v)]; 318 } 319 320 static __inline pt_entry_t * 321 pmap_l3pte(pt_entry_t *lev1map, vaddr_t v, pt_entry_t *l2pte) 322 { 323 pt_entry_t *l1pte, *lev2map, *lev3map; 324 325 if (l2pte == NULL) { 326 l1pte = pmap_l1pte(lev1map, v); 327 if (pmap_pte_v(l1pte) == 0) 328 return NULL; 329 330 lev2map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l1pte)); 331 l2pte = &lev2map[l2pte_index(v)]; 332 if (pmap_pte_v(l2pte) == 0) 333 return NULL; 334 } 335 336 lev3map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l2pte)); 337 return &lev3map[l3pte_index(v)]; 338 } 339 340 /* 341 * Macro for processing deferred I-stream synchronization. 342 * 343 * The pmap module may defer syncing the user I-stream until the 344 * return to userspace, since the IMB PALcode op can be quite 345 * expensive. Since user instructions won't be executed until 346 * the return to userspace, this can be deferred until userret(). 347 */ 348 #define PMAP_USERRET(pmap) \ 349 do { \ 350 const unsigned long cpu_id = cpu_number(); \ 351 \ 352 if ((pmap)->pm_percpu[cpu_id].pmc_needisync) { \ 353 (pmap)->pm_percpu[cpu_id].pmc_needisync = 0; \ 354 alpha_pal_imb(); \ 355 } \ 356 } while (0) 357 358 /* 359 * pmap-specific data store in the vm_page structure. 360 */ 361 #define __HAVE_VM_PAGE_MD 362 struct vm_page_md { 363 uintptr_t pvh_listx; /* pv_entry list + attrs */ 364 }; 365 366 #define VM_MDPAGE_PVS(pg) \ 367 ((struct pv_entry *)((pg)->mdpage.pvh_listx & ~3UL)) 368 369 #define VM_MDPAGE_INIT(pg) \ 370 do { \ 371 (pg)->mdpage.pvh_listx = 0UL; \ 372 } while (/*CONSTCOND*/0) 373 374 #endif /* _KERNEL */ 375 376 #endif /* _PMAP_MACHINE_ */ 377
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