z8530var.h revision 1.4 1 1.4 nisimura /* $NetBSD: z8530var.h,v 1.4 2000/09/09 06:08:42 nisimura Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*
4 1.1 thorpej * Copyright (c) 1994 Gordon W. Ross
5 1.1 thorpej * Copyright (c) 1992, 1993
6 1.1 thorpej * The Regents of the University of California. All rights reserved.
7 1.1 thorpej *
8 1.1 thorpej * This software was developed by the Computer Systems Engineering group
9 1.1 thorpej * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10 1.1 thorpej * contributed to Berkeley.
11 1.1 thorpej *
12 1.1 thorpej * All advertising materials mentioning features or use of this software
13 1.1 thorpej * must display the following acknowledgement:
14 1.1 thorpej * This product includes software developed by the University of
15 1.1 thorpej * California, Lawrence Berkeley Laboratory.
16 1.1 thorpej *
17 1.1 thorpej * Redistribution and use in source and binary forms, with or without
18 1.1 thorpej * modification, are permitted provided that the following conditions
19 1.1 thorpej * are met:
20 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
21 1.1 thorpej * notice, this list of conditions and the following disclaimer.
22 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
23 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
24 1.1 thorpej * documentation and/or other materials provided with the distribution.
25 1.1 thorpej * 3. All advertising materials mentioning features or use of this software
26 1.1 thorpej * must display the following acknowledgement:
27 1.1 thorpej * This product includes software developed by the University of
28 1.1 thorpej * California, Berkeley and its contributors.
29 1.1 thorpej * 4. Neither the name of the University nor the names of its contributors
30 1.1 thorpej * may be used to endorse or promote products derived from this software
31 1.1 thorpej * without specific prior written permission.
32 1.1 thorpej *
33 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
34 1.1 thorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35 1.1 thorpej * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36 1.1 thorpej * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
37 1.1 thorpej * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 1.1 thorpej * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39 1.1 thorpej * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 1.1 thorpej * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
41 1.1 thorpej * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42 1.1 thorpej * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 1.1 thorpej * SUCH DAMAGE.
44 1.1 thorpej *
45 1.1 thorpej * @(#)zsvar.h 8.1 (Berkeley) 6/11/93
46 1.1 thorpej */
47 1.1 thorpej
48 1.1 thorpej /*
49 1.1 thorpej * XXX XXX XXX THIS DOES NOT WORK WITH MULTIPLE ATTACHMENTS!!! XXX XXX XXX
50 1.1 thorpej */
51 1.1 thorpej
52 1.1 thorpej #include <dev/ic/z8530sc.h>
53 1.1 thorpej
54 1.1 thorpej struct zsc_softc {
55 1.1 thorpej struct device zsc_dev; /* required first: base device */
56 1.1 thorpej struct zs_chanstate *zsc_cs[2]; /* channel A and B soft state */
57 1.1 thorpej /* Machine-dependent part follows... */
58 1.1 thorpej struct zs_chanstate zsc_cs_store[2];
59 1.2 thorpej void *zsc_sih;
60 1.1 thorpej };
61 1.1 thorpej
62 1.1 thorpej /*
63 1.1 thorpej * Functions to read and write individual registers in a channel.
64 1.1 thorpej * The ZS chip requires a 1.6 uSec. recovery time between accesses,
65 1.1 thorpej * and the Alpha TC hardware does NOT take care of this for you.
66 1.1 thorpej * The delay is now handled inside the chip access functions.
67 1.1 thorpej * These could be inlines, but with the delay, speed is moot.
68 1.1 thorpej */
69 1.1 thorpej
70 1.4 nisimura u_int zs_read_reg(struct zs_chanstate *cs, u_int reg);
71 1.4 nisimura u_int zs_read_csr(struct zs_chanstate *cs);
72 1.4 nisimura u_int zs_read_data(struct zs_chanstate *cs);
73 1.4 nisimura
74 1.4 nisimura void zs_write_reg(struct zs_chanstate *cs, u_int reg, u_int val);
75 1.4 nisimura void zs_write_csr(struct zs_chanstate *cs, u_int val);
76 1.4 nisimura void zs_write_data(struct zs_chanstate *cs, u_int val);
77 1.1 thorpej
78 1.1 thorpej /* Interrupt priority for the SCC chip; needs to match ZSHARD_PRI. */
79 1.1 thorpej #define splzs() spltty()
80