jensenio_intr.c revision 1.1 1 /* $NetBSD: jensenio_intr.c,v 1.1 2000/07/12 20:36:09 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
40
41 __KERNEL_RCSID(0, "$NetBSD: jensenio_intr.c,v 1.1 2000/07/12 20:36:09 thorpej Exp $");
42
43 #include <sys/types.h>
44 #include <sys/param.h>
45 #include <sys/time.h>
46 #include <sys/systm.h>
47 #include <sys/errno.h>
48 #include <sys/malloc.h>
49 #include <sys/device.h>
50 #include <sys/syslog.h>
51
52 #include <machine/autoconf.h>
53
54 #include <dev/eisa/eisavar.h>
55
56 #include <dev/isa/isareg.h>
57 #include <dev/isa/isavar.h>
58
59 #include <alpha/jensenio/jenseniovar.h>
60
61 static bus_space_tag_t pic_iot;
62 static bus_space_handle_t pic_ioh[2];
63 static bus_space_handle_t pic_elcr_ioh;
64
65 static const int irq_to_vector[] = {
66 0x900, /* com0 */
67 0x920, /* com1 */
68 0x980, /* keyboard */
69 0x990, /* mouse */
70 };
71
72 int jensenio_eisa_intr_map(void *, u_int, eisa_intr_handle_t *);
73 const char *jensenio_eisa_intr_string(void *, int);
74 const struct evcnt *jensenio_eisa_intr_evcnt(void *, int);
75 void *jensenio_eisa_intr_establish(void *, int, int, int,
76 int (*)(void *), void *);
77 void jensenio_eisa_intr_disestablish(void *, void *);
78 int jensenio_eisa_intr_alloc(void *, int, int, int *);
79
80 /*
81 * We have 16 (E)ISA IRQs, plus 4 hard-wired vectors which we
82 * assign to "virtual" IRQs.
83 */
84 #define JENSEN_MAX_IRQ 20
85
86 struct alpha_shared_intr *jensenio_eisa_intr;
87
88 void jensenio_iointr(void *, u_long);
89
90 void jensenio_enable_intr(int, int);
91 void jensenio_setlevel(int, int);
92 void jensenio_pic_init(void);
93
94 const int jensenio_intr_deftype[JENSEN_MAX_IRQ] = {
95 IST_EDGE, /* 0: interval timer 0 output */
96 IST_EDGE, /* 1: line printer */
97 IST_UNUSABLE, /* 2: (cascade) */
98 IST_NONE, /* 3: EISA pin B25 */
99 IST_NONE, /* 4: EISA pin B24 */
100 IST_NONE, /* 5: EISA pin B23 */
101 IST_NONE, /* 6: EISA pin B22 (floppy) */
102 IST_NONE, /* 7: EISA pin B21 */
103 IST_EDGE, /* 8: RTC */
104 IST_NONE, /* 9: EISA pin B04 */
105 IST_NONE, /* 10: EISA pin D03 */
106 IST_NONE, /* 11: EISA pin D04 */
107 IST_NONE, /* 12: EISA pin D05 */
108 IST_UNUSABLE, /* 13: not connected */
109 IST_NONE, /* 14: EISA pin D07 (SCSI) */
110 IST_NONE, /* 15: EISA pin D06 */
111 IST_EDGE, /* 16: com0 (vector 0x900) */
112 IST_EDGE, /* 17: com1 (vector 0x920) */
113 IST_EDGE, /* 18: keyboard (vector 0x980) */
114 IST_EDGE, /* 19: mouse (vector 0x990) */
115 };
116
117 void
118 jensenio_intr_init(struct jensenio_config *jcp)
119 {
120 eisa_chipset_tag_t ec = &jcp->jc_ec;
121 isa_chipset_tag_t ic = &jcp->jc_ic;
122 char *cp;
123 int i;
124
125 pic_iot = &jcp->jc_eisa_iot;
126
127 jensenio_pic_init();
128
129 jensenio_eisa_intr = alpha_shared_intr_alloc(JENSEN_MAX_IRQ, 16);
130 for (i = 0; i < JENSEN_MAX_IRQ; i++) {
131 alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
132 i, jensenio_intr_deftype[i]);
133 /* Don't bother with stray interrupts. */
134 alpha_shared_intr_set_maxstrays(jensenio_eisa_intr,
135 i, 0);
136
137 cp = alpha_shared_intr_string(jensenio_eisa_intr, i);
138 if (i > 15) {
139 sprintf(cp, "0x%03x", irq_to_vector[i - 16]);
140 evcnt_attach_dynamic(alpha_shared_intr_evcnt(
141 jensenio_eisa_intr, i), EVCNT_TYPE_INTR,
142 NULL, "vector", cp);
143 } else {
144 sprintf(cp, "irq %d", i);
145 evcnt_attach_dynamic(alpha_shared_intr_evcnt(
146 jensenio_eisa_intr, i), EVCNT_TYPE_INTR,
147 NULL, "eisa", cp);
148 }
149 }
150
151 /*
152 * The cascasde interrupt must be edge triggered and always enabled.
153 */
154 jensenio_setlevel(2, 0);
155 jensenio_enable_intr(2, 1);
156
157 /*
158 * Initialize the EISA chipset.
159 */
160 ec->ec_v = jcp;
161 ec->ec_intr_map = jensenio_eisa_intr_map;
162 ec->ec_intr_string = jensenio_eisa_intr_string;
163 ec->ec_intr_evcnt = jensenio_eisa_intr_evcnt;
164 ec->ec_intr_establish = jensenio_eisa_intr_establish;
165 ec->ec_intr_disestablish = jensenio_eisa_intr_disestablish;
166
167 /*
168 * Initialize the ISA chipset.
169 */
170 ic->ic_v = jcp;
171 ic->ic_intr_establish = jensenio_eisa_intr_establish;
172 ic->ic_intr_disestablish = jensenio_eisa_intr_disestablish;
173 ic->ic_intr_alloc = jensenio_eisa_intr_alloc;
174 ic->ic_intr_evcnt = jensenio_eisa_intr_evcnt;
175
176 set_iointr(jensenio_iointr);
177 }
178
179 int
180 jensenio_eisa_intr_map(void *v, u_int eirq, eisa_intr_handle_t *ihp)
181 {
182
183 if (eirq > 15) {
184 printf("jensenio_eisa_intr_map: bad EISA IRQ %d\n",
185 eirq);
186 *ihp = -1;
187 return (1);
188 }
189
190 if (jensenio_intr_deftype[eirq] == IST_UNUSABLE) {
191 printf("jensenio_eisa_intr_map: unusable irq %d\n",
192 eirq);
193 *ihp = -1;
194 return (1);
195 }
196
197 *ihp = eirq;
198 return (0);
199 }
200
201 const char *
202 jensenio_eisa_intr_string(void *v, int eirq)
203 {
204 static char irqstr[64];
205
206 if (eirq > 19)
207 panic("jensenio_eisa_intr_string: bogus IRQ %d\n", eirq);
208
209 if (eirq > 15)
210 sprintf(irqstr, "vector 0x%03x", irq_to_vector[eirq - 16]);
211 else
212 sprintf(irqstr, "eisa irq %d", eirq);
213
214 return (irqstr);
215 }
216
217 const struct evcnt *
218 jensenio_eisa_intr_evcnt(void *v, int eirq)
219 {
220
221 if (eirq > 19)
222 panic("jensenio_eisa_intr_evcnt: bogus IRQ %d\n", eirq);
223
224 return (alpha_shared_intr_evcnt(jensenio_eisa_intr, eirq));
225 }
226
227 void *
228 jensenio_eisa_intr_establish(void *v, int irq, int type, int level,
229 int (*fn)(void *), void *arg)
230 {
231 void *cookie;
232
233 if (irq > 19 || type == IST_NONE)
234 panic("jensenio_eisa_intr_establish: bogus irq or type");
235
236 if (jensenio_intr_deftype[irq] == IST_UNUSABLE) {
237 printf("jensenio_eisa_intr_establish: IRQ %d not usable\n",
238 irq);
239 return (NULL);
240 }
241
242 cookie = alpha_shared_intr_establish(jensenio_eisa_intr, irq,
243 type, level, fn, arg, "eisa irq");
244
245 if (irq > 15)
246 return (cookie);
247
248 if (cookie != NULL &&
249 alpha_shared_intr_isactive(jensenio_eisa_intr, irq)) {
250 jensenio_setlevel(irq,
251 alpha_shared_intr_get_sharetype(jensenio_eisa_intr,
252 irq) == IST_LEVEL);
253 jensenio_enable_intr(irq, 1);
254 }
255
256 return (cookie);
257 }
258
259 void
260 jensenio_eisa_intr_disestablish(void *v, void *cookie)
261 {
262 struct alpha_shared_intrhand *ih = cookie;
263 int s, irq = ih->ih_num;
264
265 s = splhigh();
266
267 /* Remove it from the link. */
268 alpha_shared_intr_disestablish(jensenio_eisa_intr, cookie,
269 "eisa irq");
270
271 if (irq > 15) {
272 splx(s);
273 return;
274 }
275
276 if (alpha_shared_intr_isactive(jensenio_eisa_intr, irq) == 0) {
277 jensenio_enable_intr(irq, 0);
278 alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
279 irq, jensenio_intr_deftype[irq]);
280 }
281
282 splx(s);
283 }
284
285 int
286 jensenio_eisa_intr_alloc(void *v, int mask, int type, int *rqp)
287 {
288
289 /* XXX Not supported right now. */
290 return (1);
291 }
292
293 void
294 jensenio_iointr(void *framep, u_long vec)
295 {
296 int irq;
297
298 switch (vec) {
299 case 0x900: irq = 16; break; /* com0 */
300 case 0x920: irq = 17; break; /* com1 */
301 case 0x980: irq = 18; break; /* keyboard */
302 case 0x990: irq = 19; break; /* mouse */
303 default:
304 if (vec >= 0x800) {
305 if (vec >= 0x800 + (16 << 4))
306 panic("jensenio_iointr: vec 0x%lx out of "
307 "range\n", vec);
308 irq = (vec - 0x800) >> 4;
309 } else
310 panic("jensenio_iointr: wierd vec 0x%lx\n", vec);
311 }
312
313 if (!alpha_shared_intr_dispatch(jensenio_eisa_intr, irq)) {
314 alpha_shared_intr_stray(jensenio_eisa_intr, irq,
315 "eisa irq");
316 if (ALPHA_SHARED_INTR_DISABLE(jensenio_eisa_intr, irq))
317 jensenio_enable_intr(irq, 0);
318 }
319 }
320
321 void
322 jensenio_enable_intr(int irq, int onoff)
323 {
324 int pic;
325 u_int8_t bit, mask;
326
327 pic = irq >> 3;
328 bit = 1 << (irq & 0x7);
329
330 mask = bus_space_read_1(pic_iot, pic_ioh[pic], 1);
331 if (onoff)
332 mask &= ~bit;
333 else
334 mask |= bit;
335 bus_space_write_1(pic_iot, pic_ioh[pic], 1, mask);
336 }
337
338 void
339 jensenio_setlevel(int irq, int level)
340 {
341 int elcr;
342 u_int8_t bit, mask;
343
344 elcr = irq >> 3;
345 bit = 1 << (irq & 0x7);
346
347 mask = bus_space_read_1(pic_iot, pic_elcr_ioh, elcr);
348 if (level)
349 mask |= bit;
350 else
351 mask &= ~bit;
352 bus_space_write_1(pic_iot, pic_elcr_ioh, elcr, mask);
353 }
354
355 void
356 jensenio_pic_init(void)
357 {
358 static const int picaddr[2] = { IO_ICU1, IO_ICU2 };
359 int pic;
360
361 /*
362 * Map the PICs and mask off the interrupts on them.
363 */
364 for (pic = 0; pic < 2; pic++) {
365 if (bus_space_map(pic_iot, picaddr[pic], 2, 0, &pic_ioh[pic]))
366 panic("jensenio_init_intr: unable to map PIC %d", pic);
367 bus_space_write_1(pic_iot, pic_ioh[pic], 1, 0xff);
368 }
369
370 /*
371 * Map the ELCR registers.
372 */
373 if (bus_space_map(pic_iot, 0x4d0, 2, 0, &pic_elcr_ioh))
374 panic("jensenio_init_intr: unable to map ELCR registers");
375 }
376