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jensenio_intr.c revision 1.11 
      1 /* $NetBSD: jensenio_intr.c,v 1.11 2014/03/21 16:39:29 christos Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     33 
     34 __KERNEL_RCSID(0, "$NetBSD: jensenio_intr.c,v 1.11 2014/03/21 16:39:29 christos Exp $");
     35 
     36 #include <sys/types.h>
     37 #include <sys/param.h>
     38 #include <sys/time.h>
     39 #include <sys/systm.h>
     40 #include <sys/errno.h>
     41 #include <sys/malloc.h>
     42 #include <sys/device.h>
     43 #include <sys/syslog.h>
     44 
     45 #include <machine/autoconf.h>
     46 
     47 #include <dev/eisa/eisavar.h>
     48 
     49 #include <dev/isa/isareg.h>
     50 #include <dev/isa/isavar.h>
     51 
     52 #include <alpha/jensenio/jenseniovar.h>
     53 
     54 static bus_space_tag_t pic_iot;
     55 static bus_space_handle_t pic_ioh[2];
     56 static bus_space_handle_t pic_elcr_ioh;
     57 
     58 int	jensenio_eisa_intr_map(void *, u_int, eisa_intr_handle_t *);
     59 const char *jensenio_eisa_intr_string(void *, int, char *, size_t);
     60 const struct evcnt *jensenio_eisa_intr_evcnt(void *, int);
     61 void	*jensenio_eisa_intr_establish(void *, int, int, int,
     62 	    int (*)(void *), void *);
     63 void	jensenio_eisa_intr_disestablish(void *, void *);
     64 int	jensenio_eisa_intr_alloc(void *, int, int, int *);
     65 
     66 #define	JENSEN_MAX_IRQ		16
     67 #define	JENSEN_MAX_IRQ_STR	16
     68 
     69 struct alpha_shared_intr *jensenio_eisa_intr;
     70 
     71 void	jensenio_iointr(void *, u_long);
     72 
     73 void	jensenio_enable_intr(int, int);
     74 void	jensenio_setlevel(int, int);
     75 void	jensenio_pic_init(void);
     76 
     77 const int jensenio_intr_deftype[JENSEN_MAX_IRQ] = {
     78 	IST_EDGE,		/*  0: interval timer 0 output */
     79 	IST_EDGE,		/*  1: line printer */
     80 	IST_UNUSABLE,		/*  2: (cascade) */
     81 	IST_NONE,		/*  3: EISA pin B25 */
     82 	IST_NONE,		/*  4: EISA pin B24 */
     83 	IST_NONE,		/*  5: EISA pin B23 */
     84 	IST_NONE,		/*  6: EISA pin B22 (floppy) */
     85 	IST_NONE,		/*  7: EISA pin B21 */
     86 	IST_EDGE,		/*  8: RTC */
     87 	IST_NONE,		/*  9: EISA pin B04 */
     88 	IST_NONE,		/* 10: EISA pin D03 */
     89 	IST_NONE,		/* 11: EISA pin D04 */
     90 	IST_NONE,		/* 12: EISA pin D05 */
     91 	IST_UNUSABLE,		/* 13: not connected */
     92 	IST_NONE,		/* 14: EISA pin D07 (SCSI) */
     93 	IST_NONE,		/* 15: EISA pin D06 */
     94 };
     95 
     96 static inline void
     97 jensenio_specific_eoi(int irq)
     98 {
     99 
    100 	if (irq > 7)
    101 		bus_space_write_1(pic_iot, pic_ioh[1],
    102 		    0, 0x20 | (irq & 0x07));
    103 	bus_space_write_1(pic_iot, pic_ioh[0],
    104 	    0, 0x20 | (irq > 7 ? 2 : irq));
    105 }
    106 
    107 void
    108 jensenio_intr_init(struct jensenio_config *jcp)
    109 {
    110 	eisa_chipset_tag_t ec = &jcp->jc_ec;
    111 	isa_chipset_tag_t ic = &jcp->jc_ic;
    112 	char *cp;
    113 	int i;
    114 
    115 	pic_iot = &jcp->jc_eisa_iot;
    116 
    117 	jensenio_pic_init();
    118 
    119 	jensenio_eisa_intr = alpha_shared_intr_alloc(JENSEN_MAX_IRQ,
    120 	    JENSEN_MAX_IRQ_STR);
    121 	for (i = 0; i < JENSEN_MAX_IRQ; i++) {
    122 		alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
    123 		    i, jensenio_intr_deftype[i]);
    124 		/* Don't bother with stray interrupts. */
    125 		alpha_shared_intr_set_maxstrays(jensenio_eisa_intr,
    126 		    i, 0);
    127 
    128 		cp = alpha_shared_intr_string(jensenio_eisa_intr, i);
    129 		snprintf(cp, JENSEN_MAX_IRQ_STR, "irq %d", i);
    130 		evcnt_attach_dynamic(alpha_shared_intr_evcnt(
    131 		    jensenio_eisa_intr, i), EVCNT_TYPE_INTR,
    132 		    NULL, "eisa", cp);
    133 	}
    134 
    135 	/*
    136 	 * The cascasde interrupt must be edge triggered and always enabled.
    137 	 */
    138 	jensenio_setlevel(2, 0);
    139 	jensenio_enable_intr(2, 1);
    140 
    141 	/*
    142 	 * Initialize the EISA chipset.
    143 	 */
    144 	ec->ec_v = jcp;
    145 	ec->ec_intr_map = jensenio_eisa_intr_map;
    146 	ec->ec_intr_string = jensenio_eisa_intr_string;
    147 	ec->ec_intr_evcnt = jensenio_eisa_intr_evcnt;
    148 	ec->ec_intr_establish = jensenio_eisa_intr_establish;
    149 	ec->ec_intr_disestablish = jensenio_eisa_intr_disestablish;
    150 
    151 	/*
    152 	 * Initialize the ISA chipset.
    153 	 */
    154 	ic->ic_v = jcp;
    155 	ic->ic_intr_establish = jensenio_eisa_intr_establish;
    156 	ic->ic_intr_disestablish = jensenio_eisa_intr_disestablish;
    157 	ic->ic_intr_alloc = jensenio_eisa_intr_alloc;
    158 	ic->ic_intr_evcnt = jensenio_eisa_intr_evcnt;
    159 }
    160 
    161 int
    162 jensenio_eisa_intr_map(void *v, u_int eirq, eisa_intr_handle_t *ihp)
    163 {
    164 
    165 	if (eirq >= JENSEN_MAX_IRQ) {
    166 		printf("jensenio_eisa_intr_map: bogus IRQ %d", eirq);
    167 		*ihp = -1;
    168 		return (1);
    169 	}
    170 
    171 	if (jensenio_intr_deftype[eirq] == IST_UNUSABLE) {
    172 		printf("jensenio_eisa_intr_map: unusable irq %d\n",
    173 		    eirq);
    174 		*ihp = -1;
    175 		return (1);
    176 	}
    177 
    178 	*ihp = eirq;
    179 	return (0);
    180 }
    181 
    182 const char *
    183 jensenio_eisa_intr_string(void *v, int eirq, char *buf, size_t len)
    184 {
    185 	if (eirq >= JENSEN_MAX_IRQ)
    186 		panic("%s: bogus IRQ %d", __func__, eirq);
    187 
    188 	snprintf(buf, len, "eisa irq %d", eirq);
    189 	return buf;
    190 }
    191 
    192 const struct evcnt *
    193 jensenio_eisa_intr_evcnt(void *v, int eirq)
    194 {
    195 
    196 	if (eirq >= JENSEN_MAX_IRQ)
    197 		panic("%s: bogus IRQ %d", __func__, eirq);
    198 
    199 	return (alpha_shared_intr_evcnt(jensenio_eisa_intr, eirq));
    200 }
    201 
    202 void *
    203 jensenio_eisa_intr_establish(void *v, int irq, int type, int level,
    204     int (*fn)(void *), void *arg)
    205 {
    206 	void *cookie;
    207 
    208 	if (irq >= JENSEN_MAX_IRQ || type == IST_NONE)
    209 		panic("jensenio_eisa_intr_establish: bogus irq or type");
    210 
    211 	if (jensenio_intr_deftype[irq] == IST_UNUSABLE) {
    212 		printf("jensenio_eisa_intr_establish: IRQ %d not usable\n",
    213 		    irq);
    214 		return (NULL);
    215 	}
    216 
    217 	cookie = alpha_shared_intr_establish(jensenio_eisa_intr, irq,
    218 	    type, level, fn, arg, "eisa irq");
    219 
    220 	if (cookie != NULL &&
    221 	    alpha_shared_intr_firstactive(jensenio_eisa_intr, irq)) {
    222 		scb_set(0x800 + SCB_IDXTOVEC(irq), jensenio_iointr, NULL,
    223 		    level);
    224 		jensenio_setlevel(irq,
    225 		    alpha_shared_intr_get_sharetype(jensenio_eisa_intr,
    226 						    irq) == IST_LEVEL);
    227 		jensenio_enable_intr(irq, 1);
    228 	}
    229 
    230 	return (cookie);
    231 }
    232 
    233 void
    234 jensenio_eisa_intr_disestablish(void *v, void *cookie)
    235 {
    236 	struct alpha_shared_intrhand *ih = cookie;
    237 	int s, irq = ih->ih_num;
    238 
    239 	s = splhigh();
    240 
    241 	/* Remove it from the link. */
    242 	alpha_shared_intr_disestablish(jensenio_eisa_intr, cookie,
    243 	    "eisa irq");
    244 
    245 	if (alpha_shared_intr_isactive(jensenio_eisa_intr, irq) == 0) {
    246 		jensenio_enable_intr(irq, 0);
    247 		alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
    248 		    irq, jensenio_intr_deftype[irq]);
    249 		scb_free(0x800 + SCB_IDXTOVEC(irq));
    250 	}
    251 
    252 	splx(s);
    253 }
    254 
    255 int
    256 jensenio_eisa_intr_alloc(void *v, int mask, int type, int *rqp)
    257 {
    258 
    259 	/* XXX Not supported right now. */
    260 	return (1);
    261 }
    262 
    263 void
    264 jensenio_iointr(void *framep, u_long vec)
    265 {
    266 	int irq;
    267 
    268 	irq = SCB_VECTOIDX(vec - 0x800);
    269 
    270 	if (!alpha_shared_intr_dispatch(jensenio_eisa_intr, irq))
    271 		alpha_shared_intr_stray(jensenio_eisa_intr, irq, "eisa irq");
    272 
    273 	jensenio_specific_eoi(irq);
    274 }
    275 
    276 void
    277 jensenio_enable_intr(int irq, int onoff)
    278 {
    279 	int pic;
    280 	uint8_t bit, mask;
    281 
    282 	pic = irq >> 3;
    283 	bit = 1 << (irq & 0x7);
    284 
    285 	mask = bus_space_read_1(pic_iot, pic_ioh[pic], 1);
    286 	if (onoff)
    287 		mask &= ~bit;
    288 	else
    289 		mask |= bit;
    290 	bus_space_write_1(pic_iot, pic_ioh[pic], 1, mask);
    291 }
    292 
    293 void
    294 jensenio_setlevel(int irq, int level)
    295 {
    296 	int elcr;
    297 	uint8_t bit, mask;
    298 
    299 	elcr = irq >> 3;
    300 	bit = 1 << (irq & 0x7);
    301 
    302 	mask = bus_space_read_1(pic_iot, pic_elcr_ioh, elcr);
    303 	if (level)
    304 		mask |= bit;
    305 	else
    306 		mask &= ~bit;
    307 	bus_space_write_1(pic_iot, pic_elcr_ioh, elcr, mask);
    308 }
    309 
    310 void
    311 jensenio_pic_init(void)
    312 {
    313 	static const int picaddr[2] = { IO_ICU1, IO_ICU2 };
    314 	int pic;
    315 
    316 	/*
    317 	 * Map the PICs and mask off the interrupts on them.
    318 	 */
    319 	for (pic = 0; pic < 2; pic++) {
    320 		if (bus_space_map(pic_iot, picaddr[pic], 2, 0, &pic_ioh[pic]))
    321 			panic("jensenio_init_intr: unable to map PIC %d", pic);
    322 		bus_space_write_1(pic_iot, pic_ioh[pic], 1, 0xff);
    323 	}
    324 
    325 	/*
    326 	 * Map the ELCR registers.
    327 	 */
    328 	if (bus_space_map(pic_iot, 0x4d0, 2, 0, &pic_elcr_ioh))
    329 		panic("jensenio_init_intr: unable to map ELCR registers");
    330 }
    331