jensenio_intr.c revision 1.6
1 /* $NetBSD: jensenio_intr.c,v 1.6 2007/07/27 13:37:07 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 40 41 __KERNEL_RCSID(0, "$NetBSD: jensenio_intr.c,v 1.6 2007/07/27 13:37:07 tsutsui Exp $"); 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/time.h> 46 #include <sys/systm.h> 47 #include <sys/errno.h> 48 #include <sys/malloc.h> 49 #include <sys/device.h> 50 #include <sys/syslog.h> 51 52 #include <machine/autoconf.h> 53 54 #include <dev/eisa/eisavar.h> 55 56 #include <dev/isa/isareg.h> 57 #include <dev/isa/isavar.h> 58 59 #include <alpha/jensenio/jenseniovar.h> 60 61 static bus_space_tag_t pic_iot; 62 static bus_space_handle_t pic_ioh[2]; 63 static bus_space_handle_t pic_elcr_ioh; 64 65 int jensenio_eisa_intr_map(void *, u_int, eisa_intr_handle_t *); 66 const char *jensenio_eisa_intr_string(void *, int); 67 const struct evcnt *jensenio_eisa_intr_evcnt(void *, int); 68 void *jensenio_eisa_intr_establish(void *, int, int, int, 69 int (*)(void *), void *); 70 void jensenio_eisa_intr_disestablish(void *, void *); 71 int jensenio_eisa_intr_alloc(void *, int, int, int *); 72 73 #define JENSEN_MAX_IRQ 16 74 75 struct alpha_shared_intr *jensenio_eisa_intr; 76 77 void jensenio_iointr(void *, u_long); 78 79 void jensenio_enable_intr(int, int); 80 void jensenio_setlevel(int, int); 81 void jensenio_pic_init(void); 82 83 const int jensenio_intr_deftype[JENSEN_MAX_IRQ] = { 84 IST_EDGE, /* 0: interval timer 0 output */ 85 IST_EDGE, /* 1: line printer */ 86 IST_UNUSABLE, /* 2: (cascade) */ 87 IST_NONE, /* 3: EISA pin B25 */ 88 IST_NONE, /* 4: EISA pin B24 */ 89 IST_NONE, /* 5: EISA pin B23 */ 90 IST_NONE, /* 6: EISA pin B22 (floppy) */ 91 IST_NONE, /* 7: EISA pin B21 */ 92 IST_EDGE, /* 8: RTC */ 93 IST_NONE, /* 9: EISA pin B04 */ 94 IST_NONE, /* 10: EISA pin D03 */ 95 IST_NONE, /* 11: EISA pin D04 */ 96 IST_NONE, /* 12: EISA pin D05 */ 97 IST_UNUSABLE, /* 13: not connected */ 98 IST_NONE, /* 14: EISA pin D07 (SCSI) */ 99 IST_NONE, /* 15: EISA pin D06 */ 100 }; 101 102 static inline void 103 jensenio_specific_eoi(int irq) 104 { 105 106 if (irq > 7) 107 bus_space_write_1(pic_iot, pic_ioh[1], 108 0, 0x20 | (irq & 0x07)); 109 bus_space_write_1(pic_iot, pic_ioh[0], 110 0, 0x20 | (irq > 7 ? 2 : irq)); 111 } 112 113 void 114 jensenio_intr_init(struct jensenio_config *jcp) 115 { 116 eisa_chipset_tag_t ec = &jcp->jc_ec; 117 isa_chipset_tag_t ic = &jcp->jc_ic; 118 char *cp; 119 int i; 120 121 pic_iot = &jcp->jc_eisa_iot; 122 123 jensenio_pic_init(); 124 125 jensenio_eisa_intr = alpha_shared_intr_alloc(JENSEN_MAX_IRQ, 16); 126 for (i = 0; i < JENSEN_MAX_IRQ; i++) { 127 alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr, 128 i, jensenio_intr_deftype[i]); 129 /* Don't bother with stray interrupts. */ 130 alpha_shared_intr_set_maxstrays(jensenio_eisa_intr, 131 i, 0); 132 133 cp = alpha_shared_intr_string(jensenio_eisa_intr, i); 134 sprintf(cp, "irq %d", i); 135 evcnt_attach_dynamic(alpha_shared_intr_evcnt( 136 jensenio_eisa_intr, i), EVCNT_TYPE_INTR, 137 NULL, "eisa", cp); 138 } 139 140 /* 141 * The cascasde interrupt must be edge triggered and always enabled. 142 */ 143 jensenio_setlevel(2, 0); 144 jensenio_enable_intr(2, 1); 145 146 /* 147 * Initialize the EISA chipset. 148 */ 149 ec->ec_v = jcp; 150 ec->ec_intr_map = jensenio_eisa_intr_map; 151 ec->ec_intr_string = jensenio_eisa_intr_string; 152 ec->ec_intr_evcnt = jensenio_eisa_intr_evcnt; 153 ec->ec_intr_establish = jensenio_eisa_intr_establish; 154 ec->ec_intr_disestablish = jensenio_eisa_intr_disestablish; 155 156 /* 157 * Initialize the ISA chipset. 158 */ 159 ic->ic_v = jcp; 160 ic->ic_intr_establish = jensenio_eisa_intr_establish; 161 ic->ic_intr_disestablish = jensenio_eisa_intr_disestablish; 162 ic->ic_intr_alloc = jensenio_eisa_intr_alloc; 163 ic->ic_intr_evcnt = jensenio_eisa_intr_evcnt; 164 } 165 166 int 167 jensenio_eisa_intr_map(void *v, u_int eirq, eisa_intr_handle_t *ihp) 168 { 169 170 if (eirq >= JENSEN_MAX_IRQ) { 171 printf("jensenio_eisa_intr_map: bogus IRQ %d", eirq); 172 *ihp = -1; 173 return (1); 174 } 175 176 if (jensenio_intr_deftype[eirq] == IST_UNUSABLE) { 177 printf("jensenio_eisa_intr_map: unusable irq %d\n", 178 eirq); 179 *ihp = -1; 180 return (1); 181 } 182 183 *ihp = eirq; 184 return (0); 185 } 186 187 const char * 188 jensenio_eisa_intr_string(void *v, int eirq) 189 { 190 static char irqstr[64]; 191 192 if (eirq >= JENSEN_MAX_IRQ) 193 panic("jensenio_eisa_intr_string: bogus IRQ %d", eirq); 194 195 sprintf(irqstr, "eisa irq %d", eirq); 196 197 return (irqstr); 198 } 199 200 const struct evcnt * 201 jensenio_eisa_intr_evcnt(void *v, int eirq) 202 { 203 204 if (eirq >= JENSEN_MAX_IRQ) 205 panic("jensenio_eisa_intr_evcnt: bogus IRQ %d", eirq); 206 207 return (alpha_shared_intr_evcnt(jensenio_eisa_intr, eirq)); 208 } 209 210 void * 211 jensenio_eisa_intr_establish(void *v, int irq, int type, int level, 212 int (*fn)(void *), void *arg) 213 { 214 void *cookie; 215 216 if (irq >= JENSEN_MAX_IRQ || type == IST_NONE) 217 panic("jensenio_eisa_intr_establish: bogus irq or type"); 218 219 if (jensenio_intr_deftype[irq] == IST_UNUSABLE) { 220 printf("jensenio_eisa_intr_establish: IRQ %d not usable\n", 221 irq); 222 return (NULL); 223 } 224 225 cookie = alpha_shared_intr_establish(jensenio_eisa_intr, irq, 226 type, level, fn, arg, "eisa irq"); 227 228 if (cookie != NULL && 229 alpha_shared_intr_firstactive(jensenio_eisa_intr, irq)) { 230 scb_set(0x800 + SCB_IDXTOVEC(irq), jensenio_iointr, NULL); 231 jensenio_setlevel(irq, 232 alpha_shared_intr_get_sharetype(jensenio_eisa_intr, 233 irq) == IST_LEVEL); 234 jensenio_enable_intr(irq, 1); 235 } 236 237 return (cookie); 238 } 239 240 void 241 jensenio_eisa_intr_disestablish(void *v, void *cookie) 242 { 243 struct alpha_shared_intrhand *ih = cookie; 244 int s, irq = ih->ih_num; 245 246 s = splhigh(); 247 248 /* Remove it from the link. */ 249 alpha_shared_intr_disestablish(jensenio_eisa_intr, cookie, 250 "eisa irq"); 251 252 if (alpha_shared_intr_isactive(jensenio_eisa_intr, irq) == 0) { 253 jensenio_enable_intr(irq, 0); 254 alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr, 255 irq, jensenio_intr_deftype[irq]); 256 scb_free(0x800 + SCB_IDXTOVEC(irq)); 257 } 258 259 splx(s); 260 } 261 262 int 263 jensenio_eisa_intr_alloc(void *v, int mask, int type, int *rqp) 264 { 265 266 /* XXX Not supported right now. */ 267 return (1); 268 } 269 270 void 271 jensenio_iointr(void *framep, u_long vec) 272 { 273 int irq; 274 275 irq = SCB_VECTOIDX(vec - 0x800); 276 277 if (!alpha_shared_intr_dispatch(jensenio_eisa_intr, irq)) 278 alpha_shared_intr_stray(jensenio_eisa_intr, irq, "eisa irq"); 279 280 jensenio_specific_eoi(irq); 281 } 282 283 void 284 jensenio_enable_intr(int irq, int onoff) 285 { 286 int pic; 287 u_int8_t bit, mask; 288 289 pic = irq >> 3; 290 bit = 1 << (irq & 0x7); 291 292 mask = bus_space_read_1(pic_iot, pic_ioh[pic], 1); 293 if (onoff) 294 mask &= ~bit; 295 else 296 mask |= bit; 297 bus_space_write_1(pic_iot, pic_ioh[pic], 1, mask); 298 } 299 300 void 301 jensenio_setlevel(int irq, int level) 302 { 303 int elcr; 304 u_int8_t bit, mask; 305 306 elcr = irq >> 3; 307 bit = 1 << (irq & 0x7); 308 309 mask = bus_space_read_1(pic_iot, pic_elcr_ioh, elcr); 310 if (level) 311 mask |= bit; 312 else 313 mask &= ~bit; 314 bus_space_write_1(pic_iot, pic_elcr_ioh, elcr, mask); 315 } 316 317 void 318 jensenio_pic_init(void) 319 { 320 static const int picaddr[2] = { IO_ICU1, IO_ICU2 }; 321 int pic; 322 323 /* 324 * Map the PICs and mask off the interrupts on them. 325 */ 326 for (pic = 0; pic < 2; pic++) { 327 if (bus_space_map(pic_iot, picaddr[pic], 2, 0, &pic_ioh[pic])) 328 panic("jensenio_init_intr: unable to map PIC %d", pic); 329 bus_space_write_1(pic_iot, pic_ioh[pic], 1, 0xff); 330 } 331 332 /* 333 * Map the ELCR registers. 334 */ 335 if (bus_space_map(pic_iot, 0x4d0, 2, 0, &pic_elcr_ioh)) 336 panic("jensenio_init_intr: unable to map ELCR registers"); 337 } 338
Indexes created Tue Sep 30 11:09:46 GMT 2025