jensenioreg.h revision 1.1.4.2
1 1.1.4.2 bouyer /* $NetBSD: jensenioreg.h,v 1.1.4.2 2000/11/20 19:57:02 bouyer Exp $ */ 2 1.1.4.2 bouyer 3 1.1.4.2 bouyer /*- 4 1.1.4.2 bouyer * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 1.1.4.2 bouyer * All rights reserved. 6 1.1.4.2 bouyer * 7 1.1.4.2 bouyer * This code is derived from software contributed to The NetBSD Foundation 8 1.1.4.2 bouyer * by Jason R. Thorpe. 9 1.1.4.2 bouyer * 10 1.1.4.2 bouyer * Redistribution and use in source and binary forms, with or without 11 1.1.4.2 bouyer * modification, are permitted provided that the following conditions 12 1.1.4.2 bouyer * are met: 13 1.1.4.2 bouyer * 1. Redistributions of source code must retain the above copyright 14 1.1.4.2 bouyer * notice, this list of conditions and the following disclaimer. 15 1.1.4.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright 16 1.1.4.2 bouyer * notice, this list of conditions and the following disclaimer in the 17 1.1.4.2 bouyer * documentation and/or other materials provided with the distribution. 18 1.1.4.2 bouyer * 3. All advertising materials mentioning features or use of this software 19 1.1.4.2 bouyer * must display the following acknowledgement: 20 1.1.4.2 bouyer * This product includes software developed by the NetBSD 21 1.1.4.2 bouyer * Foundation, Inc. and its contributors. 22 1.1.4.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.1.4.2 bouyer * contributors may be used to endorse or promote products derived 24 1.1.4.2 bouyer * from this software without specific prior written permission. 25 1.1.4.2 bouyer * 26 1.1.4.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.1.4.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.1.4.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.1.4.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.1.4.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.1.4.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.1.4.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.1.4.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.1.4.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.1.4.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.1.4.2 bouyer * POSSIBILITY OF SUCH DAMAGE. 37 1.1.4.2 bouyer */ 38 1.1.4.2 bouyer 39 1.1.4.2 bouyer /* 40 1.1.4.2 bouyer * System register description for the DECpc AXP 150 ("Jensen"). 41 1.1.4.2 bouyer */ 42 1.1.4.2 bouyer 43 1.1.4.2 bouyer #define REGVAL(r) (*(__volatile u_int64_t *)ALPHA_PHYS_TO_K0SEG(r)) 44 1.1.4.2 bouyer 45 1.1.4.2 bouyer /* 46 1.1.4.2 bouyer * EISA Interrupt Acknowledge: 1.0000.0000 47 1.1.4.2 bouyer */ 48 1.1.4.2 bouyer #define JENSEN_EISA_INTA 0x100000000UL 49 1.1.4.2 bouyer 50 1.1.4.2 bouyer 51 1.1.4.2 bouyer /* 52 1.1.4.2 bouyer * FEPROM 0 (256K): 1.8000.0000 53 1.1.4.2 bouyer */ 54 1.1.4.2 bouyer #define JENSEN_FEPROM0 0x180000000UL 55 1.1.4.2 bouyer 56 1.1.4.2 bouyer 57 1.1.4.2 bouyer /* 58 1.1.4.2 bouyer * FEPROM 1 (1M): 1.a000.0000 59 1.1.4.2 bouyer */ 60 1.1.4.2 bouyer #define JENSEN_FEPROM1 0x1a0000000UL 61 1.1.4.2 bouyer 62 1.1.4.2 bouyer 63 1.1.4.2 bouyer /* 64 1.1.4.2 bouyer * VLSI VL82C106 junk I/O chip: 1.C000.0000 65 1.1.4.2 bouyer */ 66 1.1.4.2 bouyer #define JENSEN_VL82C106 0x1c0000000UL 67 1.1.4.2 bouyer 68 1.1.4.2 bouyer 69 1.1.4.2 bouyer /* 70 1.1.4.2 bouyer * Host Address Extension Register: 1.D000.0000 71 1.1.4.2 bouyer * 72 1.1.4.2 bouyer * 8-bit register that contains the upper bigs of address 73 1.1.4.2 bouyer * destined for the EISA bus. 74 1.1.4.2 bouyer */ 75 1.1.4.2 bouyer #define JENSEN_HAE 0x1d0000000UL 76 1.1.4.2 bouyer #define HAE_MASK 0x7 /* EISA <31:25> */ 77 1.1.4.2 bouyer #define HAE_SHIFT 25 78 1.1.4.2 bouyer 79 1.1.4.2 bouyer 80 1.1.4.2 bouyer /* 81 1.1.4.2 bouyer * System Control Register: 1.E000.0000 82 1.1.4.2 bouyer * 83 1.1.4.2 bouyer * 8-bit register that contains memory configuration information 84 1.1.4.2 bouyer * and the LED display code bits. 85 1.1.4.2 bouyer * 86 1.1.4.2 bouyer * Memory configuration: 87 1.1.4.2 bouyer * 88 1.1.4.2 bouyer * 0 4M x 36 SIMMs 89 1.1.4.2 bouyer * 1 4M x 36 x 2 SIMMs 90 1.1.4.2 bouyer * 2 16M x 36 SIMMs 91 1.1.4.2 bouyer * 3 16M x 36 x 2 SIMMs 92 1.1.4.2 bouyer */ 93 1.1.4.2 bouyer #define JENSEN_SYSCTL 0x1e0000000UL 94 1.1.4.2 bouyer #define SYSCTL_LEDMASK 0x0f /* LED codes */ 95 1.1.4.2 bouyer #define SYSCTL_BANK0_CFG 0x30 /* Bank 0 config */ 96 1.1.4.2 bouyer #define SYSCTL_BANK0_CFG_SHIFT 4 97 1.1.4.2 bouyer #define SYSCTL_BANK1_CFG 0xc0 /* Bank 1 config */ 98 1.1.4.2 bouyer #define SYSCTL_BANK1_CFG_SHIFT 6 99 1.1.4.2 bouyer 100 1.1.4.2 bouyer 101 1.1.4.2 bouyer /* 102 1.1.4.2 bouyer * Spare Register: 1.f000.0000 103 1.1.4.2 bouyer */ 104 1.1.4.2 bouyer #define JENSEN_SPARE 0x1f0000000UL 105 1.1.4.2 bouyer 106 1.1.4.2 bouyer 107 1.1.4.2 bouyer /* 108 1.1.4.2 bouyer * EISA Memory Space: 2.0000.0000 109 1.1.4.2 bouyer */ 110 1.1.4.2 bouyer #define JENSEN_EISA_MEM 0x200000000UL 111 1.1.4.2 bouyer 112 1.1.4.2 bouyer 113 1.1.4.2 bouyer /* 114 1.1.4.2 bouyer * EISA I/O Space: 3.0000.0000 115 1.1.4.2 bouyer */ 116 1.1.4.2 bouyer #define JENSEN_EISA_IO 0x300000000UL 117
Indexes created Thu Oct 30 22:09:55 GMT 2025