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jensenioreg.h revision 1.1.44.1 
      1 /* $NetBSD: jensenioreg.h,v 1.1.44.1 2006/06/21 14:48:15 yamt Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the NetBSD
     21  *	Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 /*
     40  * System register description for the DECpc AXP 150 ("Jensen").
     41  */
     42 
     43 #define	REGVAL(r)	(*(volatile u_int64_t *)ALPHA_PHYS_TO_K0SEG(r))
     44 
     45 /*
     46  * EISA Interrupt Acknowledge:			1.0000.0000
     47  */
     48 #define	JENSEN_EISA_INTA	0x100000000UL
     49 
     50 
     51 /*
     52  * FEPROM 0 (256K):				1.8000.0000
     53  */
     54 #define	JENSEN_FEPROM0		0x180000000UL
     55 
     56 
     57 /*
     58  * FEPROM 1 (1M):				1.a000.0000
     59  */
     60 #define	JENSEN_FEPROM1		0x1a0000000UL
     61 
     62 
     63 /*
     64  * VLSI VL82C106 junk I/O chip:			1.C000.0000
     65  */
     66 #define	JENSEN_VL82C106		0x1c0000000UL
     67 
     68 
     69 /*
     70  * Host Address Extension Register:		1.D000.0000
     71  *
     72  *	8-bit register that contains the upper bigs of address
     73  *	destined for the EISA bus.
     74  */
     75 #define	JENSEN_HAE		0x1d0000000UL
     76 #define	HAE_MASK		0x7		/* EISA <31:25> */
     77 #define	HAE_SHIFT		25
     78 
     79 
     80 /*
     81  * System Control Register:			1.E000.0000
     82  *
     83  *	8-bit register that contains memory configuration information
     84  *	and the LED display code bits.
     85  *
     86  *	Memory configuration:
     87  *
     88  *		0		4M x 36 SIMMs
     89  *		1		4M x 36 x 2 SIMMs
     90  *		2		16M x 36 SIMMs
     91  *		3		16M x 36 x 2 SIMMs
     92  */
     93 #define	JENSEN_SYSCTL		0x1e0000000UL
     94 #define	SYSCTL_LEDMASK		0x0f		/* LED codes */
     95 #define	SYSCTL_BANK0_CFG	0x30		/* Bank 0 config */
     96 #define	SYSCTL_BANK0_CFG_SHIFT	4
     97 #define	SYSCTL_BANK1_CFG	0xc0		/* Bank 1 config */
     98 #define	SYSCTL_BANK1_CFG_SHIFT	6
     99 
    100 
    101 /*
    102  * Spare Register:				1.f000.0000
    103  */
    104 #define	JENSEN_SPARE		0x1f0000000UL
    105 
    106 
    107 /*
    108  * EISA Memory Space:				2.0000.0000
    109  */
    110 #define	JENSEN_EISA_MEM		0x200000000UL
    111 
    112 
    113 /*
    114  * EISA I/O Space:				3.0000.0000
    115  */
    116 #define	JENSEN_EISA_IO		0x300000000UL
    117