mcbus.c revision 1.12
1 /* $NetBSD: mcbus.c,v 1.12 2002/10/02 04:06:38 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 /* 34 * Autoconfiguration routines for the MCBUS system 35 * bus found on AlphaServer 4100 systems. 36 */ 37 38 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 39 40 __KERNEL_RCSID(0, "$NetBSD: mcbus.c,v 1.12 2002/10/02 04:06:38 thorpej Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <machine/autoconf.h> 48 #include <machine/rpb.h> 49 #include <machine/pte.h> 50 51 #include <alpha/mcbus/mcbusreg.h> 52 #include <alpha/mcbus/mcbusvar.h> 53 54 #include <alpha/pci/mcpciareg.h> 55 56 #include "locators.h" 57 58 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 59 #define MCPCIA_EXISTS(mid, gid) \ 60 (!badaddr((void *)KV(MCPCIA_BRIDGE_ADDR(gid, mid)), sizeof (u_int32_t))) 61 62 extern struct cfdriver mcbus_cd; 63 64 struct mcbus_cpu_busdep mcbus_primary; 65 66 static int mcbusmatch __P((struct device *, struct cfdata *, void *)); 67 static void mcbusattach __P((struct device *, struct device *, void *)); 68 static int mcbusprint __P((void *, const char *)); 69 static int mcbussbm __P((struct device *, struct cfdata *, void *)); 70 static char *mcbus_node_type_str __P((u_int8_t)); 71 72 typedef struct { 73 struct device mcbus_dev; 74 u_int8_t mcbus_types[MCBUS_MID_MAX]; 75 } mcbus_softc_t; 76 77 CFATTACH_DECL(mcbus, sizeof (mcbus_softc_t), 78 mcbusmatch, mcbusattach, NULL, NULL); 79 80 /* 81 * Tru64 UNIX (formerly Digital UNIX (formerly DEC OSF/1)) probes for MCPCIAs 82 * in the following order: 83 * 84 * 5, 4, 7, 6 85 * 86 * This is so that the built-in CD-ROM on the internal 53c810 is always 87 * dka500. We probe them in the same order, for consistency. 88 */ 89 const int mcbus_mcpcia_probe_order[] = { 5, 4, 7, 6 }; 90 91 extern void mcpcia_config_cleanup __P((void)); 92 93 static int 94 mcbusprint(aux, cp) 95 void *aux; 96 const char *cp; 97 { 98 struct mcbus_dev_attach_args *tap = aux; 99 printf(" mid %d: %s", tap->ma_mid, mcbus_node_type_str(tap->ma_type)); 100 return (UNCONF); 101 } 102 103 static int 104 mcbussbm(parent, cf, aux) 105 struct device *parent; 106 struct cfdata *cf; 107 void *aux; 108 { 109 struct mcbus_dev_attach_args *tap = aux; 110 if (tap->ma_name != mcbus_cd.cd_name) 111 return (0); 112 if (cf->cf_loc[MCBUSCF_MID] != MCBUSCF_MID_DEFAULT && 113 cf->cf_loc[MCBUSCF_MID] != tap->ma_mid) 114 return (0); 115 return (config_match(parent, cf, aux)); 116 } 117 118 static int 119 mcbusmatch(parent, cf, aux) 120 struct device *parent; 121 struct cfdata *cf; 122 void *aux; 123 { 124 struct mainbus_attach_args *ma = aux; 125 126 /* Make sure we're looking for a MCBUS. */ 127 if (strcmp(ma->ma_name, mcbus_cd.cd_name) != 0) 128 return (0); 129 130 /* 131 * Only available on 4100 processor type platforms. 132 */ 133 if (cputype != ST_DEC_4100) 134 return (0); 135 return (1); 136 } 137 138 static void 139 mcbusattach(parent, self, aux) 140 struct device *parent; 141 struct device *self; 142 void *aux; 143 { 144 static const char * const bcs[CPU_BCacheMask + 1] = { 145 "No", "1MB", "2MB", "4MB", 146 }; 147 struct mcbus_dev_attach_args ta; 148 mcbus_softc_t *mbp = (mcbus_softc_t *)self; 149 int i, mid; 150 151 printf(": %s BCache\n", mcbus_primary.mcbus_valid ? 152 bcs[mcbus_primary.mcbus_bcache] : "Unknown"); 153 154 mbp->mcbus_types[0] = MCBUS_TYPE_RES; 155 for (mid = 1; mid <= MCBUS_MID_MAX; ++mid) 156 mbp->mcbus_types[mid] = MCBUS_TYPE_UNK; 157 158 /* 159 * Find and "configure" memory. 160 */ 161 ta.ma_name = mcbus_cd.cd_name; 162 163 /* 164 * XXX If we ever support more than one MCBUS, we'll 165 * XXX have to probe for them, and map them to unit 166 * XXX numbers. 167 */ 168 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 169 ta.ma_mid = 1; 170 ta.ma_type = MCBUS_TYPE_MEM; 171 mbp->mcbus_types[1] = MCBUS_TYPE_MEM; 172 (void) config_found_sm(self, &ta, mcbusprint, mcbussbm); 173 174 /* 175 * Now find PCI busses. 176 */ 177 for (i = 0; i < MCPCIA_PER_MCBUS; i++) { 178 mid = mcbus_mcpcia_probe_order[i]; 179 ta.ma_name = mcbus_cd.cd_name; 180 /* 181 * XXX If we ever support more than one MCBUS, we'll 182 * XXX have to probe for them, and map them to unit 183 * XXX numbers. 184 */ 185 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 186 ta.ma_mid = mid; 187 ta.ma_type = MCBUS_TYPE_PCI; 188 if (MCPCIA_EXISTS(ta.ma_mid, ta.ma_gid)) 189 (void) config_found_sm(self, &ta, mcbusprint, mcbussbm); 190 } 191 192 #if 0 193 /* 194 * Deal with hooking CPU instances to MCBUS module ids. 195 * 196 * Note that we do this here because it's the read of 197 * stupid MCPCIA WHOAMI register that can get us the 198 * module ID and type of the configuring CPU. 199 */ 200 201 if (mcbus_primary.mcbus_valid) { 202 mid = mcbus_primary.mcbus_cpu_mid; 203 printf("%s mid %d: %s %s\n", self->dv_xname, 204 mid, mcbus_node_type_str(MCBUS_TYPE_CPU), 205 bcs[mcbus_primary.mcbus_bcache & 0x7]); 206 ta.ma_name = mcbus_cd.cd_name; 207 /* 208 * XXX If we ever support more than one MCBUS, we'll 209 * XXX have to probe for them, and map them to unit 210 * XXX numbers. 211 */ 212 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 213 ta.ma_mid = mid; 214 ta.ma_type = MCBUS_TYPE_CPU; 215 mbp->mcbus_types[mid] = MCBUS_TYPE_CPU; 216 (void) config_found_sm(self, &ta, mcbusprint, mcbussbm); 217 } 218 #endif 219 220 /* 221 * Now clean up after configuring everything. 222 * 223 * This is an unfortunate layering violation- but 224 * we can't enable interrupts until *all* probing 225 * is done, but the code and knowledge to clean 226 * up after probing and to enable interrupts is 227 * down in the MCPCIA layer. 228 */ 229 mcpcia_config_cleanup(); 230 } 231 232 static char * 233 mcbus_node_type_str(type) 234 u_int8_t type; 235 { 236 switch (type) { 237 case MCBUS_TYPE_RES: 238 panic ("RESERVED TYPE IN MCBUS_NODE_TYPE_STR"); 239 break; 240 case MCBUS_TYPE_UNK: 241 panic ("UNKNOWN TYPE IN MCBUS_NODE_TYPE_STR"); 242 break; 243 case MCBUS_TYPE_MEM: 244 return ("Memory"); 245 case MCBUS_TYPE_CPU: 246 return ("CPU"); 247 case MCBUS_TYPE_PCI: 248 return ("PCI Bridge"); 249 default: 250 panic("REALLY UNKNWON (%x) TYPE IN MCBUS_NODE_TYPE_STR", type); 251 break; 252 } 253 } 254
Indexes created Mon Sep 29 21:09:56 GMT 2025