mcbus.c revision 1.13
1 /* $NetBSD: mcbus.c,v 1.13 2003/01/01 00:39:20 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 /* 34 * Autoconfiguration routines for the MCBUS system 35 * bus found on AlphaServer 4100 systems. 36 */ 37 38 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 39 40 __KERNEL_RCSID(0, "$NetBSD: mcbus.c,v 1.13 2003/01/01 00:39:20 thorpej Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <machine/autoconf.h> 48 #include <machine/rpb.h> 49 #include <machine/pte.h> 50 51 #include <alpha/mcbus/mcbusreg.h> 52 #include <alpha/mcbus/mcbusvar.h> 53 54 #include <alpha/pci/mcpciareg.h> 55 56 #include "locators.h" 57 58 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 59 #define MCPCIA_EXISTS(mid, gid) \ 60 (!badaddr((void *)KV(MCPCIA_BRIDGE_ADDR(gid, mid)), sizeof (u_int32_t))) 61 62 extern struct cfdriver mcbus_cd; 63 64 struct mcbus_cpu_busdep mcbus_primary; 65 66 static int mcbusmatch __P((struct device *, struct cfdata *, void *)); 67 static void mcbusattach __P((struct device *, struct device *, void *)); 68 static int mcbusprint __P((void *, const char *)); 69 static int mcbussbm __P((struct device *, struct cfdata *, void *)); 70 static char *mcbus_node_type_str __P((u_int8_t)); 71 72 typedef struct { 73 struct device mcbus_dev; 74 u_int8_t mcbus_types[MCBUS_MID_MAX]; 75 } mcbus_softc_t; 76 77 CFATTACH_DECL(mcbus, sizeof (mcbus_softc_t), 78 mcbusmatch, mcbusattach, NULL, NULL); 79 80 /* 81 * Tru64 UNIX (formerly Digital UNIX (formerly DEC OSF/1)) probes for MCPCIAs 82 * in the following order: 83 * 84 * 5, 4, 7, 6 85 * 86 * This is so that the built-in CD-ROM on the internal 53c810 is always 87 * dka500. We probe them in the same order, for consistency. 88 */ 89 const int mcbus_mcpcia_probe_order[] = { 5, 4, 7, 6 }; 90 91 extern void mcpcia_config_cleanup __P((void)); 92 93 static int 94 mcbusprint(aux, cp) 95 void *aux; 96 const char *cp; 97 { 98 struct mcbus_dev_attach_args *tap = aux; 99 aprint_normal(" mid %d: %s", tap->ma_mid, 100 mcbus_node_type_str(tap->ma_type)); 101 return (UNCONF); 102 } 103 104 static int 105 mcbussbm(parent, cf, aux) 106 struct device *parent; 107 struct cfdata *cf; 108 void *aux; 109 { 110 struct mcbus_dev_attach_args *tap = aux; 111 if (tap->ma_name != mcbus_cd.cd_name) 112 return (0); 113 if (cf->cf_loc[MCBUSCF_MID] != MCBUSCF_MID_DEFAULT && 114 cf->cf_loc[MCBUSCF_MID] != tap->ma_mid) 115 return (0); 116 return (config_match(parent, cf, aux)); 117 } 118 119 static int 120 mcbusmatch(parent, cf, aux) 121 struct device *parent; 122 struct cfdata *cf; 123 void *aux; 124 { 125 struct mainbus_attach_args *ma = aux; 126 127 /* Make sure we're looking for a MCBUS. */ 128 if (strcmp(ma->ma_name, mcbus_cd.cd_name) != 0) 129 return (0); 130 131 /* 132 * Only available on 4100 processor type platforms. 133 */ 134 if (cputype != ST_DEC_4100) 135 return (0); 136 return (1); 137 } 138 139 static void 140 mcbusattach(parent, self, aux) 141 struct device *parent; 142 struct device *self; 143 void *aux; 144 { 145 static const char * const bcs[CPU_BCacheMask + 1] = { 146 "No", "1MB", "2MB", "4MB", 147 }; 148 struct mcbus_dev_attach_args ta; 149 mcbus_softc_t *mbp = (mcbus_softc_t *)self; 150 int i, mid; 151 152 printf(": %s BCache\n", mcbus_primary.mcbus_valid ? 153 bcs[mcbus_primary.mcbus_bcache] : "Unknown"); 154 155 mbp->mcbus_types[0] = MCBUS_TYPE_RES; 156 for (mid = 1; mid <= MCBUS_MID_MAX; ++mid) 157 mbp->mcbus_types[mid] = MCBUS_TYPE_UNK; 158 159 /* 160 * Find and "configure" memory. 161 */ 162 ta.ma_name = mcbus_cd.cd_name; 163 164 /* 165 * XXX If we ever support more than one MCBUS, we'll 166 * XXX have to probe for them, and map them to unit 167 * XXX numbers. 168 */ 169 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 170 ta.ma_mid = 1; 171 ta.ma_type = MCBUS_TYPE_MEM; 172 mbp->mcbus_types[1] = MCBUS_TYPE_MEM; 173 (void) config_found_sm(self, &ta, mcbusprint, mcbussbm); 174 175 /* 176 * Now find PCI busses. 177 */ 178 for (i = 0; i < MCPCIA_PER_MCBUS; i++) { 179 mid = mcbus_mcpcia_probe_order[i]; 180 ta.ma_name = mcbus_cd.cd_name; 181 /* 182 * XXX If we ever support more than one MCBUS, we'll 183 * XXX have to probe for them, and map them to unit 184 * XXX numbers. 185 */ 186 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 187 ta.ma_mid = mid; 188 ta.ma_type = MCBUS_TYPE_PCI; 189 if (MCPCIA_EXISTS(ta.ma_mid, ta.ma_gid)) 190 (void) config_found_sm(self, &ta, mcbusprint, mcbussbm); 191 } 192 193 #if 0 194 /* 195 * Deal with hooking CPU instances to MCBUS module ids. 196 * 197 * Note that we do this here because it's the read of 198 * stupid MCPCIA WHOAMI register that can get us the 199 * module ID and type of the configuring CPU. 200 */ 201 202 if (mcbus_primary.mcbus_valid) { 203 mid = mcbus_primary.mcbus_cpu_mid; 204 printf("%s mid %d: %s %s\n", self->dv_xname, 205 mid, mcbus_node_type_str(MCBUS_TYPE_CPU), 206 bcs[mcbus_primary.mcbus_bcache & 0x7]); 207 ta.ma_name = mcbus_cd.cd_name; 208 /* 209 * XXX If we ever support more than one MCBUS, we'll 210 * XXX have to probe for them, and map them to unit 211 * XXX numbers. 212 */ 213 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 214 ta.ma_mid = mid; 215 ta.ma_type = MCBUS_TYPE_CPU; 216 mbp->mcbus_types[mid] = MCBUS_TYPE_CPU; 217 (void) config_found_sm(self, &ta, mcbusprint, mcbussbm); 218 } 219 #endif 220 221 /* 222 * Now clean up after configuring everything. 223 * 224 * This is an unfortunate layering violation- but 225 * we can't enable interrupts until *all* probing 226 * is done, but the code and knowledge to clean 227 * up after probing and to enable interrupts is 228 * down in the MCPCIA layer. 229 */ 230 mcpcia_config_cleanup(); 231 } 232 233 static char * 234 mcbus_node_type_str(type) 235 u_int8_t type; 236 { 237 switch (type) { 238 case MCBUS_TYPE_RES: 239 panic ("RESERVED TYPE IN MCBUS_NODE_TYPE_STR"); 240 break; 241 case MCBUS_TYPE_UNK: 242 panic ("UNKNOWN TYPE IN MCBUS_NODE_TYPE_STR"); 243 break; 244 case MCBUS_TYPE_MEM: 245 return ("Memory"); 246 case MCBUS_TYPE_CPU: 247 return ("CPU"); 248 case MCBUS_TYPE_PCI: 249 return ("PCI Bridge"); 250 default: 251 panic("REALLY UNKNWON (%x) TYPE IN MCBUS_NODE_TYPE_STR", type); 252 break; 253 } 254 } 255
Indexes created Sun Sep 28 07:09:56 GMT 2025