mcbus.c revision 1.15
1 /* $NetBSD: mcbus.c,v 1.15 2005/06/02 13:17:45 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 1998 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 /* 34 * Autoconfiguration routines for the MCBUS system 35 * bus found on AlphaServer 4100 systems. 36 */ 37 38 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 39 40 __KERNEL_RCSID(0, "$NetBSD: mcbus.c,v 1.15 2005/06/02 13:17:45 drochner Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <machine/autoconf.h> 48 #include <machine/rpb.h> 49 #include <machine/pte.h> 50 51 #include <alpha/mcbus/mcbusreg.h> 52 #include <alpha/mcbus/mcbusvar.h> 53 54 #include <alpha/pci/mcpciareg.h> 55 56 #include "locators.h" 57 58 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 59 #define MCPCIA_EXISTS(mid, gid) \ 60 (!badaddr((void *)KV(MCPCIA_BRIDGE_ADDR(gid, mid)), sizeof (u_int32_t))) 61 62 extern struct cfdriver mcbus_cd; 63 64 struct mcbus_cpu_busdep mcbus_primary; 65 66 static int mcbusmatch __P((struct device *, struct cfdata *, void *)); 67 static void mcbusattach __P((struct device *, struct device *, void *)); 68 static int mcbusprint __P((void *, const char *)); 69 static int mcbussbm __P((struct device *, struct cfdata *, 70 const locdesc_t *, void *)); 71 static const char *mcbus_node_type_str __P((u_int8_t)); 72 73 typedef struct { 74 struct device mcbus_dev; 75 u_int8_t mcbus_types[MCBUS_MID_MAX]; 76 } mcbus_softc_t; 77 78 CFATTACH_DECL(mcbus, sizeof (mcbus_softc_t), 79 mcbusmatch, mcbusattach, NULL, NULL); 80 81 /* 82 * Tru64 UNIX (formerly Digital UNIX (formerly DEC OSF/1)) probes for MCPCIAs 83 * in the following order: 84 * 85 * 5, 4, 7, 6 86 * 87 * This is so that the built-in CD-ROM on the internal 53c810 is always 88 * dka500. We probe them in the same order, for consistency. 89 */ 90 const int mcbus_mcpcia_probe_order[] = { 5, 4, 7, 6 }; 91 92 extern void mcpcia_config_cleanup __P((void)); 93 94 static int 95 mcbusprint(aux, cp) 96 void *aux; 97 const char *cp; 98 { 99 struct mcbus_dev_attach_args *tap = aux; 100 aprint_normal(" mid %d: %s", tap->ma_mid, 101 mcbus_node_type_str(tap->ma_type)); 102 return (UNCONF); 103 } 104 105 static int 106 mcbussbm(parent, cf, ldesc, aux) 107 struct device *parent; 108 struct cfdata *cf; 109 const locdesc_t *ldesc; 110 void *aux; 111 { 112 113 if (cf->cf_loc[MCBUSCF_MID] != MCBUSCF_MID_DEFAULT && 114 cf->cf_loc[MCBUSCF_MID] != ldesc->locs[MCBUSCF_MID]) 115 return (0); 116 117 return (config_match(parent, cf, aux)); 118 } 119 120 static int 121 mcbusmatch(parent, cf, aux) 122 struct device *parent; 123 struct cfdata *cf; 124 void *aux; 125 { 126 struct mainbus_attach_args *ma = aux; 127 128 /* Make sure we're looking for a MCBUS. */ 129 if (strcmp(ma->ma_name, mcbus_cd.cd_name) != 0) 130 return (0); 131 132 /* 133 * Only available on 4100 processor type platforms. 134 */ 135 if (cputype != ST_DEC_4100) 136 return (0); 137 return (1); 138 } 139 140 static void 141 mcbusattach(parent, self, aux) 142 struct device *parent; 143 struct device *self; 144 void *aux; 145 { 146 static const char * const bcs[CPU_BCacheMask + 1] = { 147 "No", "1MB", "2MB", "4MB", 148 }; 149 struct mcbus_dev_attach_args ta; 150 mcbus_softc_t *mbp = (mcbus_softc_t *)self; 151 int i, mid; 152 int help[2]; 153 locdesc_t *ldesc = (void *)help; /* XXX */ 154 155 printf(": %s BCache\n", mcbus_primary.mcbus_valid ? 156 bcs[mcbus_primary.mcbus_bcache] : "Unknown"); 157 158 mbp->mcbus_types[0] = MCBUS_TYPE_RES; 159 for (mid = 1; mid <= MCBUS_MID_MAX; ++mid) 160 mbp->mcbus_types[mid] = MCBUS_TYPE_UNK; 161 162 /* 163 * Find and "configure" memory. 164 */ 165 166 /* 167 * XXX If we ever support more than one MCBUS, we'll 168 * XXX have to probe for them, and map them to unit 169 * XXX numbers. 170 */ 171 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 172 ta.ma_mid = 1; 173 ta.ma_type = MCBUS_TYPE_MEM; 174 mbp->mcbus_types[1] = MCBUS_TYPE_MEM; 175 ldesc->len = 1; 176 ldesc->locs[MCBUSCF_MID] = 1; 177 (void) config_found_sm_loc(self, "mcbus", ldesc, &ta, 178 mcbusprint, mcbussbm); 179 180 /* 181 * Now find PCI busses. 182 */ 183 for (i = 0; i < MCPCIA_PER_MCBUS; i++) { 184 mid = mcbus_mcpcia_probe_order[i]; 185 /* 186 * XXX If we ever support more than one MCBUS, we'll 187 * XXX have to probe for them, and map them to unit 188 * XXX numbers. 189 */ 190 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 191 ta.ma_mid = mid; 192 ta.ma_type = MCBUS_TYPE_PCI; 193 ldesc->len = 1; 194 ldesc->locs[MCBUSCF_MID] = mid; 195 if (MCPCIA_EXISTS(ta.ma_mid, ta.ma_gid)) 196 (void) config_found_sm_loc(self, "mcbus", ldesc, &ta, 197 mcbusprint, mcbussbm); 198 } 199 200 #if 0 201 /* 202 * Deal with hooking CPU instances to MCBUS module ids. 203 * 204 * Note that we do this here because it's the read of 205 * stupid MCPCIA WHOAMI register that can get us the 206 * module ID and type of the configuring CPU. 207 */ 208 209 if (mcbus_primary.mcbus_valid) { 210 mid = mcbus_primary.mcbus_cpu_mid; 211 printf("%s mid %d: %s %s\n", self->dv_xname, 212 mid, mcbus_node_type_str(MCBUS_TYPE_CPU), 213 bcs[mcbus_primary.mcbus_bcache & 0x7]); 214 /* 215 * XXX If we ever support more than one MCBUS, we'll 216 * XXX have to probe for them, and map them to unit 217 * XXX numbers. 218 */ 219 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 220 ta.ma_mid = mid; 221 ta.ma_type = MCBUS_TYPE_CPU; 222 mbp->mcbus_types[mid] = MCBUS_TYPE_CPU; 223 ldesc->len = 1; 224 ldesc->locs[MCBUSCF_MID] = mid; 225 (void) config_found_sm_loc(self, "mcbus", ldesc, &ta, 226 mcbusprint, mcbussbm); 227 } 228 #endif 229 230 /* 231 * Now clean up after configuring everything. 232 * 233 * This is an unfortunate layering violation- but 234 * we can't enable interrupts until *all* probing 235 * is done, but the code and knowledge to clean 236 * up after probing and to enable interrupts is 237 * down in the MCPCIA layer. 238 */ 239 mcpcia_config_cleanup(); 240 } 241 242 static const char * 243 mcbus_node_type_str(type) 244 u_int8_t type; 245 { 246 switch (type) { 247 case MCBUS_TYPE_RES: 248 panic ("RESERVED TYPE IN MCBUS_NODE_TYPE_STR"); 249 break; 250 case MCBUS_TYPE_UNK: 251 panic ("UNKNOWN TYPE IN MCBUS_NODE_TYPE_STR"); 252 break; 253 case MCBUS_TYPE_MEM: 254 return ("Memory"); 255 case MCBUS_TYPE_CPU: 256 return ("CPU"); 257 case MCBUS_TYPE_PCI: 258 return ("PCI Bridge"); 259 default: 260 panic("REALLY UNKNWON (%x) TYPE IN MCBUS_NODE_TYPE_STR", type); 261 break; 262 } 263 } 264
Indexes created Tue Sep 30 11:09:46 GMT 2025