mcbus.c revision 1.16
1 /* $NetBSD: mcbus.c,v 1.16 2005/08/25 18:35:38 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 1998 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 /* 34 * Autoconfiguration routines for the MCBUS system 35 * bus found on AlphaServer 4100 systems. 36 */ 37 38 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 39 40 __KERNEL_RCSID(0, "$NetBSD: mcbus.c,v 1.16 2005/08/25 18:35:38 drochner Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <machine/autoconf.h> 48 #include <machine/rpb.h> 49 #include <machine/pte.h> 50 51 #include <alpha/mcbus/mcbusreg.h> 52 #include <alpha/mcbus/mcbusvar.h> 53 54 #include <alpha/pci/mcpciareg.h> 55 56 #include "locators.h" 57 58 #define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 59 #define MCPCIA_EXISTS(mid, gid) \ 60 (!badaddr((void *)KV(MCPCIA_BRIDGE_ADDR(gid, mid)), sizeof (u_int32_t))) 61 62 extern struct cfdriver mcbus_cd; 63 64 struct mcbus_cpu_busdep mcbus_primary; 65 66 static int mcbusmatch __P((struct device *, struct cfdata *, void *)); 67 static void mcbusattach __P((struct device *, struct device *, void *)); 68 static int mcbusprint __P((void *, const char *)); 69 static int mcbussbm __P((struct device *, struct cfdata *, 70 const locdesc_t *, void *)); 71 static const char *mcbus_node_type_str __P((u_int8_t)); 72 73 typedef struct { 74 struct device mcbus_dev; 75 u_int8_t mcbus_types[MCBUS_MID_MAX]; 76 } mcbus_softc_t; 77 78 CFATTACH_DECL(mcbus, sizeof (mcbus_softc_t), 79 mcbusmatch, mcbusattach, NULL, NULL); 80 81 /* 82 * Tru64 UNIX (formerly Digital UNIX (formerly DEC OSF/1)) probes for MCPCIAs 83 * in the following order: 84 * 85 * 5, 4, 7, 6 86 * 87 * This is so that the built-in CD-ROM on the internal 53c810 is always 88 * dka500. We probe them in the same order, for consistency. 89 */ 90 const int mcbus_mcpcia_probe_order[] = { 5, 4, 7, 6 }; 91 92 extern void mcpcia_config_cleanup __P((void)); 93 94 static int 95 mcbusprint(aux, cp) 96 void *aux; 97 const char *cp; 98 { 99 struct mcbus_dev_attach_args *tap = aux; 100 aprint_normal(" mid %d: %s", tap->ma_mid, 101 mcbus_node_type_str(tap->ma_type)); 102 return (UNCONF); 103 } 104 105 static int 106 mcbussbm(parent, cf, locs, aux) 107 struct device *parent; 108 struct cfdata *cf; 109 const locdesc_t *locs; 110 void *aux; 111 { 112 113 if (cf->cf_loc[MCBUSCF_MID] != MCBUSCF_MID_DEFAULT && 114 cf->cf_loc[MCBUSCF_MID] != locs[MCBUSCF_MID]) 115 return (0); 116 117 return (config_match(parent, cf, aux)); 118 } 119 120 static int 121 mcbusmatch(parent, cf, aux) 122 struct device *parent; 123 struct cfdata *cf; 124 void *aux; 125 { 126 struct mainbus_attach_args *ma = aux; 127 128 /* Make sure we're looking for a MCBUS. */ 129 if (strcmp(ma->ma_name, mcbus_cd.cd_name) != 0) 130 return (0); 131 132 /* 133 * Only available on 4100 processor type platforms. 134 */ 135 if (cputype != ST_DEC_4100) 136 return (0); 137 return (1); 138 } 139 140 static void 141 mcbusattach(parent, self, aux) 142 struct device *parent; 143 struct device *self; 144 void *aux; 145 { 146 static const char * const bcs[CPU_BCacheMask + 1] = { 147 "No", "1MB", "2MB", "4MB", 148 }; 149 struct mcbus_dev_attach_args ta; 150 mcbus_softc_t *mbp = (mcbus_softc_t *)self; 151 int i, mid; 152 int locs[MCBUSCF_NLOCS]; 153 154 printf(": %s BCache\n", mcbus_primary.mcbus_valid ? 155 bcs[mcbus_primary.mcbus_bcache] : "Unknown"); 156 157 mbp->mcbus_types[0] = MCBUS_TYPE_RES; 158 for (mid = 1; mid <= MCBUS_MID_MAX; ++mid) 159 mbp->mcbus_types[mid] = MCBUS_TYPE_UNK; 160 161 /* 162 * Find and "configure" memory. 163 */ 164 165 /* 166 * XXX If we ever support more than one MCBUS, we'll 167 * XXX have to probe for them, and map them to unit 168 * XXX numbers. 169 */ 170 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 171 ta.ma_mid = 1; 172 ta.ma_type = MCBUS_TYPE_MEM; 173 mbp->mcbus_types[1] = MCBUS_TYPE_MEM; 174 locs[MCBUSCF_MID] = 1; 175 (void) config_found_sm_loc(self, "mcbus", locs, &ta, 176 mcbusprint, mcbussbm); 177 178 /* 179 * Now find PCI busses. 180 */ 181 for (i = 0; i < MCPCIA_PER_MCBUS; i++) { 182 mid = mcbus_mcpcia_probe_order[i]; 183 /* 184 * XXX If we ever support more than one MCBUS, we'll 185 * XXX have to probe for them, and map them to unit 186 * XXX numbers. 187 */ 188 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 189 ta.ma_mid = mid; 190 ta.ma_type = MCBUS_TYPE_PCI; 191 locs[MCBUSCF_MID] = mid; 192 if (MCPCIA_EXISTS(ta.ma_mid, ta.ma_gid)) 193 (void) config_found_sm_loc(self, "mcbus", locs, &ta, 194 mcbusprint, mcbussbm); 195 } 196 197 #if 0 198 /* 199 * Deal with hooking CPU instances to MCBUS module ids. 200 * 201 * Note that we do this here because it's the read of 202 * stupid MCPCIA WHOAMI register that can get us the 203 * module ID and type of the configuring CPU. 204 */ 205 206 if (mcbus_primary.mcbus_valid) { 207 mid = mcbus_primary.mcbus_cpu_mid; 208 printf("%s mid %d: %s %s\n", self->dv_xname, 209 mid, mcbus_node_type_str(MCBUS_TYPE_CPU), 210 bcs[mcbus_primary.mcbus_bcache & 0x7]); 211 /* 212 * XXX If we ever support more than one MCBUS, we'll 213 * XXX have to probe for them, and map them to unit 214 * XXX numbers. 215 */ 216 ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0); 217 ta.ma_mid = mid; 218 ta.ma_type = MCBUS_TYPE_CPU; 219 mbp->mcbus_types[mid] = MCBUS_TYPE_CPU; 220 locs[MCBUSCF_MID] = mid; 221 (void) config_found_sm_loc(self, "mcbus", locs, &ta, 222 mcbusprint, mcbussbm); 223 } 224 #endif 225 226 /* 227 * Now clean up after configuring everything. 228 * 229 * This is an unfortunate layering violation- but 230 * we can't enable interrupts until *all* probing 231 * is done, but the code and knowledge to clean 232 * up after probing and to enable interrupts is 233 * down in the MCPCIA layer. 234 */ 235 mcpcia_config_cleanup(); 236 } 237 238 static const char * 239 mcbus_node_type_str(type) 240 u_int8_t type; 241 { 242 switch (type) { 243 case MCBUS_TYPE_RES: 244 panic ("RESERVED TYPE IN MCBUS_NODE_TYPE_STR"); 245 break; 246 case MCBUS_TYPE_UNK: 247 panic ("UNKNOWN TYPE IN MCBUS_NODE_TYPE_STR"); 248 break; 249 case MCBUS_TYPE_MEM: 250 return ("Memory"); 251 case MCBUS_TYPE_CPU: 252 return ("CPU"); 253 case MCBUS_TYPE_PCI: 254 return ("PCI Bridge"); 255 default: 256 panic("REALLY UNKNWON (%x) TYPE IN MCBUS_NODE_TYPE_STR", type); 257 break; 258 } 259 } 260
Indexes created Tue Sep 30 07:10:03 GMT 2025