apecs.c revision 1.35
1 /* $NetBSD: apecs.c,v 1.35 1999/04/10 01:21:38 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include "opt_dec_2100_a50.h" 31 #include "opt_dec_eb64plus.h" 32 #include "opt_dec_1000a.h" 33 #include "opt_dec_1000.h" 34 35 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 36 37 __KERNEL_RCSID(0, "$NetBSD: apecs.c,v 1.35 1999/04/10 01:21:38 cgd Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <vm/vm.h> 45 46 #include <machine/autoconf.h> 47 #include <machine/rpb.h> 48 49 #include <dev/isa/isareg.h> 50 #include <dev/isa/isavar.h> 51 52 #include <dev/pci/pcireg.h> 53 #include <dev/pci/pcivar.h> 54 #include <alpha/pci/apecsreg.h> 55 #include <alpha/pci/apecsvar.h> 56 #ifdef DEC_2100_A50 57 #include <alpha/pci/pci_2100_a50.h> 58 #endif 59 #ifdef DEC_EB64PLUS 60 #include <alpha/pci/pci_eb64plus.h> 61 #endif 62 #ifdef DEC_1000A 63 #include <alpha/pci/pci_1000a.h> 64 #endif 65 #ifdef DEC_1000 66 #include <alpha/pci/pci_1000.h> 67 #endif 68 69 int apecsmatch __P((struct device *, struct cfdata *, void *)); 70 void apecsattach __P((struct device *, struct device *, void *)); 71 72 struct cfattach apecs_ca = { 73 sizeof(struct apecs_softc), apecsmatch, apecsattach, 74 }; 75 76 extern struct cfdriver apecs_cd; 77 78 static int apecsprint __P((void *, const char *pnp)); 79 80 /* There can be only one. */ 81 int apecsfound; 82 struct apecs_config apecs_configuration; 83 84 int 85 apecsmatch(parent, match, aux) 86 struct device *parent; 87 struct cfdata *match; 88 void *aux; 89 { 90 struct mainbus_attach_args *ma = aux; 91 92 /* Make sure that we're looking for an APECS. */ 93 if (strcmp(ma->ma_name, apecs_cd.cd_name) != 0) 94 return (0); 95 96 if (apecsfound) 97 return (0); 98 99 return (1); 100 } 101 102 /* 103 * Set up the chipset's function pointers. 104 */ 105 void 106 apecs_init(acp, mallocsafe) 107 struct apecs_config *acp; 108 int mallocsafe; 109 { 110 acp->ac_comanche_pass2 = 111 (REGVAL(COMANCHE_ED) & COMANCHE_ED_PASS2) != 0; 112 acp->ac_memwidth = 113 (REGVAL(COMANCHE_GCR) & COMANCHE_GCR_WIDEMEM) != 0 ? 128 : 64; 114 acp->ac_epic_pass2 = 115 (REGVAL(EPIC_DCSR) & EPIC_DCSR_PASS2) != 0; 116 117 acp->ac_haxr1 = REGVAL(EPIC_HAXR1); 118 acp->ac_haxr2 = REGVAL(EPIC_HAXR2); 119 120 if (!acp->ac_initted) { 121 /* don't do these twice since they set up extents */ 122 apecs_bus_io_init(&acp->ac_iot, acp); 123 apecs_bus_mem_init(&acp->ac_memt, acp); 124 } 125 acp->ac_mallocsafe = mallocsafe; 126 127 apecs_pci_init(&acp->ac_pc, acp); 128 129 acp->ac_initted = 1; 130 } 131 132 void 133 apecsattach(parent, self, aux) 134 struct device *parent, *self; 135 void *aux; 136 { 137 struct apecs_softc *sc = (struct apecs_softc *)self; 138 struct apecs_config *acp; 139 struct pcibus_attach_args pba; 140 141 /* note that we've attached the chipset; can't have 2 APECSes. */ 142 apecsfound = 1; 143 144 /* 145 * set up the chipset's info; done once at console init time 146 * (maybe), but doesn't hurt to do twice. 147 */ 148 acp = sc->sc_acp = &apecs_configuration; 149 apecs_init(acp, 1); 150 151 apecs_dma_init(acp); 152 153 printf(": DECchip %s Core Logic chipset\n", 154 acp->ac_memwidth == 128 ? "21072" : "21071"); 155 printf("%s: DC21071-CA pass %d, %d-bit memory bus\n", 156 self->dv_xname, acp->ac_comanche_pass2 ? 2 : 1, acp->ac_memwidth); 157 printf("%s: DC21071-DA pass %d\n", self->dv_xname, 158 acp->ac_epic_pass2 ? 2 : 1); 159 /* XXX print bcache size */ 160 161 if (!acp->ac_epic_pass2) 162 printf("WARNING: 21071-DA NOT PASS2... NO BETS...\n"); 163 164 switch (cputype) { 165 #ifdef DEC_2100_A50 166 case ST_DEC_2100_A50: 167 pci_2100_a50_pickintr(acp); 168 break; 169 #endif 170 171 #ifdef DEC_EB64PLUS 172 case ST_EB64P: 173 pci_eb64plus_pickintr(acp); 174 break; 175 #endif 176 177 #ifdef DEC_1000A 178 case ST_DEC_1000A: 179 pci_1000a_pickintr(acp, &acp->ac_iot, &acp->ac_memt, 180 &acp->ac_pc); 181 break; 182 #endif 183 184 #ifdef DEC_1000 185 case ST_DEC_1000: 186 pci_1000_pickintr(acp, &acp->ac_iot, &acp->ac_memt, 187 &acp->ac_pc); 188 break; 189 #endif 190 191 default: 192 panic("apecsattach: shouldn't be here, really..."); 193 } 194 195 pba.pba_busname = "pci"; 196 pba.pba_iot = &acp->ac_iot; 197 pba.pba_memt = &acp->ac_memt; 198 pba.pba_dmat = 199 alphabus_dma_get_tag(&acp->ac_dmat_direct, ALPHA_BUS_PCI); 200 pba.pba_pc = &acp->ac_pc; 201 pba.pba_bus = 0; 202 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 203 config_found(self, &pba, apecsprint); 204 } 205 206 static int 207 apecsprint(aux, pnp) 208 void *aux; 209 const char *pnp; 210 { 211 register struct pcibus_attach_args *pba = aux; 212 213 /* only PCIs can attach to APECSes; easy. */ 214 if (pnp) 215 printf("%s at %s", pba->pba_busname, pnp); 216 printf(" bus %d", pba->pba_bus); 217 return (UNCONF); 218 } 219
Indexes created Thu Oct 23 18:09:57 GMT 2025