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apecs.c revision 1.49.2.1
      1 /* $NetBSD: apecs.c,v 1.49.2.1 2010/04/30 14:39:03 uebayasi Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
     34  * All rights reserved.
     35  *
     36  * Author: Chris G. Demetriou
     37  *
     38  * Permission to use, copy, modify and distribute this software and
     39  * its documentation is hereby granted, provided that both the copyright
     40  * notice and this permission notice appear in all copies of the
     41  * software, derivative works or modified versions, and any portions
     42  * thereof, and that both notices appear in supporting documentation.
     43  *
     44  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     45  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     46  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     47  *
     48  * Carnegie Mellon requests users of this software to return to
     49  *
     50  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     51  *  School of Computer Science
     52  *  Carnegie Mellon University
     53  *  Pittsburgh PA 15213-3890
     54  *
     55  * any improvements or extensions that they make and grant Carnegie the
     56  * rights to redistribute these changes.
     57  */
     58 
     59 #include "opt_dec_2100_a50.h"
     60 #include "opt_dec_eb64plus.h"
     61 #include "opt_dec_1000a.h"
     62 #include "opt_dec_1000.h"
     63 
     64 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     65 
     66 __KERNEL_RCSID(0, "$NetBSD: apecs.c,v 1.49.2.1 2010/04/30 14:39:03 uebayasi Exp $");
     67 
     68 #include <sys/param.h>
     69 #include <sys/systm.h>
     70 #include <sys/kernel.h>
     71 #include <sys/malloc.h>
     72 #include <sys/device.h>
     73 
     74 #include <uvm/uvm_extern.h>
     75 
     76 #include <machine/autoconf.h>
     77 #include <machine/rpb.h>
     78 #include <machine/sysarch.h>
     79 
     80 #include <dev/isa/isareg.h>
     81 #include <dev/isa/isavar.h>
     82 
     83 #include <dev/pci/pcireg.h>
     84 #include <dev/pci/pcivar.h>
     85 #include <alpha/pci/apecsreg.h>
     86 #include <alpha/pci/apecsvar.h>
     87 #ifdef DEC_2100_A50
     88 #include <alpha/pci/pci_2100_a50.h>
     89 #endif
     90 #ifdef DEC_EB64PLUS
     91 #include <alpha/pci/pci_eb64plus.h>
     92 #endif
     93 #ifdef DEC_1000A
     94 #include <alpha/pci/pci_1000a.h>
     95 #endif
     96 #ifdef DEC_1000
     97 #include <alpha/pci/pci_1000.h>
     98 #endif
     99 
    100 static int apecsmatch(device_t, cfdata_t, void *);
    101 static void apecsattach(device_t, device_t, void *);
    102 
    103 CFATTACH_DECL_NEW(apecs, 0, apecsmatch, apecsattach, NULL, NULL);
    104 
    105 extern struct cfdriver apecs_cd;
    106 
    107 static int apecs_bus_get_window(int, int,
    108     struct alpha_bus_space_translation *);
    109 
    110 /* There can be only one. */
    111 int apecsfound;
    112 struct apecs_config apecs_configuration;
    113 
    114 static int
    115 apecsmatch(device_t parent, cfdata_t match, void *aux)
    116 {
    117 	struct mainbus_attach_args *ma = aux;
    118 
    119 	/* Make sure that we're looking for an APECS. */
    120 	if (strcmp(ma->ma_name, apecs_cd.cd_name) != 0)
    121 		return (0);
    122 
    123 	if (apecsfound)
    124 		return (0);
    125 
    126 	return (1);
    127 }
    128 
    129 /*
    130  * Set up the chipset's function pointers.
    131  */
    132 void
    133 apecs_init(struct apecs_config *acp, int mallocsafe)
    134 {
    135 	acp->ac_comanche_pass2 =
    136 	    (REGVAL(COMANCHE_ED) & COMANCHE_ED_PASS2) != 0;
    137 	acp->ac_memwidth =
    138 	    (REGVAL(COMANCHE_GCR) & COMANCHE_GCR_WIDEMEM) != 0 ? 128 : 64;
    139 	acp->ac_epic_pass2 =
    140 	    (REGVAL(EPIC_DCSR) & EPIC_DCSR_PASS2) != 0;
    141 
    142 	acp->ac_haxr1 = REGVAL(EPIC_HAXR1);
    143 	acp->ac_haxr2 = REGVAL(EPIC_HAXR2);
    144 
    145 	if (!acp->ac_initted) {
    146 		/* don't do these twice since they set up extents */
    147 		apecs_bus_io_init(&acp->ac_iot, acp);
    148 		apecs_bus_mem_init(&acp->ac_memt, acp);
    149 
    150 		/*
    151 		 * We have two I/O windows and 3 MEM windows.
    152 		 */
    153 		alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 2;
    154 		alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3;
    155 		alpha_bus_get_window = apecs_bus_get_window;
    156 	}
    157 	acp->ac_mallocsafe = mallocsafe;
    158 
    159 	apecs_pci_init(&acp->ac_pc, acp);
    160 	alpha_pci_chipset = &acp->ac_pc;
    161 
    162 	acp->ac_initted = 1;
    163 }
    164 
    165 static void
    166 apecsattach(device_t parent, device_t self, void *aux)
    167 {
    168 	struct apecs_config *acp;
    169 	struct pcibus_attach_args pba;
    170 
    171 	/* note that we've attached the chipset; can't have 2 APECSes. */
    172 	apecsfound = 1;
    173 
    174 	/*
    175 	 * set up the chipset's info; done once at console init time
    176 	 * (maybe), but doesn't hurt to do twice.
    177 	 */
    178 	acp = &apecs_configuration;
    179 	apecs_init(acp, 1);
    180 
    181 	apecs_dma_init(acp);
    182 
    183 	printf(": DECchip %s Core Logic chipset\n",
    184 	    acp->ac_memwidth == 128 ? "21072" : "21071");
    185 	printf("%s: DC21071-CA pass %d, %d-bit memory bus\n",
    186 	    self->dv_xname, acp->ac_comanche_pass2 ? 2 : 1, acp->ac_memwidth);
    187 	printf("%s: DC21071-DA pass %d\n", self->dv_xname,
    188 	    acp->ac_epic_pass2 ? 2 : 1);
    189 	/* XXX print bcache size */
    190 
    191 	if (!acp->ac_epic_pass2)
    192 		printf("WARNING: 21071-DA NOT PASS2... NO BETS...\n");
    193 
    194 	switch (cputype) {
    195 #ifdef DEC_2100_A50
    196 	case ST_DEC_2100_A50:
    197 		pci_2100_a50_pickintr(acp);
    198 		break;
    199 #endif
    200 
    201 #ifdef DEC_EB64PLUS
    202 	case ST_EB64P:
    203 		pci_eb64plus_pickintr(acp);
    204 		break;
    205 #endif
    206 
    207 #ifdef DEC_1000A
    208 	case ST_DEC_1000A:
    209 		pci_1000a_pickintr(acp, &acp->ac_iot, &acp->ac_memt,
    210 			&acp->ac_pc);
    211 		break;
    212 #endif
    213 
    214 #ifdef DEC_1000
    215 	case ST_DEC_1000:
    216 		pci_1000_pickintr(acp, &acp->ac_iot, &acp->ac_memt,
    217 			&acp->ac_pc);
    218 		break;
    219 #endif
    220 
    221 	default:
    222 		panic("apecsattach: shouldn't be here, really...");
    223 	}
    224 
    225 	pba.pba_iot = &acp->ac_iot;
    226 	pba.pba_memt = &acp->ac_memt;
    227 	pba.pba_dmat =
    228 	    alphabus_dma_get_tag(&acp->ac_dmat_direct, ALPHA_BUS_PCI);
    229 	pba.pba_dmat64 = NULL;
    230 	pba.pba_pc = &acp->ac_pc;
    231 	pba.pba_bus = 0;
    232 	pba.pba_bridgetag = NULL;
    233 	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
    234 	    PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
    235 	config_found_ia(self, "pcibus", &pba, pcibusprint);
    236 }
    237 
    238 static int
    239 apecs_bus_get_window(int type, int window, struct alpha_bus_space_translation *abst)
    240 {
    241 	struct apecs_config *acp = &apecs_configuration;
    242 	bus_space_tag_t st;
    243 
    244 	switch (type) {
    245 	case ALPHA_BUS_TYPE_PCI_IO:
    246 		st = &acp->ac_iot;
    247 		break;
    248 
    249 	case ALPHA_BUS_TYPE_PCI_MEM:
    250 		st = &acp->ac_memt;
    251 		break;
    252 
    253 	default:
    254 		panic("apecs_bus_get_window");
    255 	}
    256 
    257 	return (alpha_bus_space_get_window(st, window, abst));
    258 }
    259