1 1.13 thorpej /* $NetBSD: apecs_bus_io.c,v 1.13 2023/12/04 00:32:10 thorpej Exp $ */ 2 1.1 cgd 3 1.1 cgd /* 4 1.1 cgd * Copyright (c) 1996 Carnegie-Mellon University. 5 1.1 cgd * All rights reserved. 6 1.1 cgd * 7 1.1 cgd * Author: Chris G. Demetriou 8 1.1 cgd * 9 1.1 cgd * Permission to use, copy, modify and distribute this software and 10 1.1 cgd * its documentation is hereby granted, provided that both the copyright 11 1.1 cgd * notice and this permission notice appear in all copies of the 12 1.1 cgd * software, derivative works or modified versions, and any portions 13 1.1 cgd * thereof, and that both notices appear in supporting documentation. 14 1.1 cgd * 15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 1.1 cgd * 19 1.1 cgd * Carnegie Mellon requests users of this software to return to 20 1.1 cgd * 21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 1.1 cgd * School of Computer Science 23 1.1 cgd * Carnegie Mellon University 24 1.1 cgd * Pittsburgh PA 15213-3890 25 1.1 cgd * 26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the 27 1.1 cgd * rights to redistribute these changes. 28 1.1 cgd */ 29 1.3 cgd 30 1.4 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 1.4 cgd 32 1.13 thorpej __KERNEL_RCSID(1, "$NetBSD: apecs_bus_io.c,v 1.13 2023/12/04 00:32:10 thorpej Exp $"); 33 1.1 cgd 34 1.1 cgd #include <sys/param.h> 35 1.1 cgd #include <sys/systm.h> 36 1.1 cgd #include <sys/syslog.h> 37 1.1 cgd #include <sys/device.h> 38 1.9 mrg 39 1.11 dyoung #include <sys/bus.h> 40 1.1 cgd 41 1.1 cgd #include <alpha/pci/apecsreg.h> 42 1.1 cgd #include <alpha/pci/apecsvar.h> 43 1.1 cgd 44 1.1 cgd #define CHIP apecs 45 1.1 cgd 46 1.13 thorpej #define CHIP_IO_ARENA(v) (((struct apecs_config *)(v))->ac_io_arena) 47 1.1 cgd 48 1.1 cgd /* IO region 1 */ 49 1.1 cgd #define CHIP_IO_W1_BUS_START(v) 0x00000000UL 50 1.1 cgd #define CHIP_IO_W1_BUS_END(v) 0x0003ffffUL 51 1.1 cgd #define CHIP_IO_W1_SYS_START(v) APECS_PCI_SIO 52 1.1 cgd #define CHIP_IO_W1_SYS_END(v) (APECS_PCI_SIO + (0x00040000UL << 5) - 1) 53 1.1 cgd 54 1.1 cgd /* IO region 2 */ 55 1.1 cgd #define CHIP_IO_W2_BUS_START(v) \ 56 1.1 cgd ((((struct apecs_config *)(v))->ac_haxr2 & EPIC_HAXR2_EADDR) + \ 57 1.1 cgd 0x00040000UL) 58 1.1 cgd #define CHIP_IO_W2_BUS_END(v) \ 59 1.1 cgd ((((struct apecs_config *)(v))->ac_haxr2 & EPIC_HAXR2_EADDR) + \ 60 1.1 cgd 0x00ffffffUL) 61 1.1 cgd #define CHIP_IO_W2_SYS_START(v) (APECS_PCI_SIO + (0x00040000UL << 5)) 62 1.1 cgd #define CHIP_IO_W2_SYS_END(v) (APECS_PCI_SIO + (0x01000000UL << 5) - 1) 63 1.1 cgd 64 1.7 thorpej #include <alpha/pci/pci_swiz_bus_io_chipdep.c> 65