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apecs_pci.c revision 1.2
      1 /*	$NetBSD: apecs_pci.c,v 1.2 1995/08/03 00:42:25 cgd Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Chris G. Demetriou
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/param.h>
     31 #include <sys/systm.h>
     32 #include <sys/kernel.h>
     33 #include <sys/device.h>
     34 #include <vm/vm.h>
     35 
     36 #include <machine/autoconf.h>
     37 #include <machine/pio.h>
     38 
     39 #include <dev/isa/isavar.h>
     40 
     41 #include <dev/pci/pcireg.h>
     42 #include <dev/pci/pcivar.h>
     43 #include <alpha/pci/pci_chipset.h>
     44 #include <alpha/pci/apecsreg.h>
     45 
     46 void	 apecs_setup __P((void));
     47 pcitag_t apecs_make_tag __P((int, int, int));
     48 pcireg_t apecs_conf_read __P((pcitag_t, int));
     49 void	 apecs_conf_write __P((pcitag_t, int, pcireg_t));
     50 int	 apecs_map_io __P((pcitag_t, int, int *));
     51 int	 apecs_map_mem __P((pcitag_t, int, vm_offset_t *, vm_offset_t *));
     52 int	 apecs_pcidma_map __P((caddr_t, vm_size_t, vm_offset_t *));
     53 void	 apecs_pcidma_unmap __P((caddr_t, vm_size_t, int, vm_offset_t *));
     54 
     55 struct pci_cs_fcns apecs_p1e_cs_fcns = {	/* XXX WHAT'S DIFFERENT? */
     56 	apecs_setup,
     57 	apecs_make_tag,
     58 	apecs_conf_read,
     59 	apecs_conf_write,
     60 	apecs_map_io,
     61 	apecs_map_mem,
     62 	apecs_pcidma_map,
     63 	apecs_pcidma_unmap,
     64 };
     65 
     66 struct pci_cs_fcns apecs_p2e_cs_fcns = {	/* XXX WHAT'S DIFFERENT? */
     67 	apecs_setup,
     68 	apecs_make_tag,
     69 	apecs_conf_read,
     70 	apecs_conf_write,
     71 	apecs_map_io,
     72 	apecs_map_mem,
     73 	apecs_pcidma_map,
     74 	apecs_pcidma_unmap,
     75 };
     76 
     77 #define	REGVAL(r)	(*(u_int32_t *)phystok0seg(r))
     78 
     79 void
     80 apecs_setup()
     81 {
     82 
     83 	/*
     84 	 * Set up PCI bus mastering DMA windows on the APECS chip.
     85 	 *
     86 	 * What the PROM wants:
     87 	 *	a 1G direct-mapped window that maps the PCI address
     88 	 *	space from 4G -> 5G to memory addresses 0 -> 1G,
     89 	 *	set up in window two.
     90 	 *
     91 	 * What we want:
     92 	 *	a 1G direct-mapped window that maps the PCI address
     93 	 *	space from 0 -> 1G to memory addresses 0 -> 1G.
     94 	 *
     95 	 * Unless we satisfy the PROM, we can't live through a reboot.
     96 	 * If we don't do what we want, I have to write more code.
     97 
     98 	 * So:
     99 	 *	Leave window two alone, map window 1 the way I want it.
    100 	 *
    101 	 * XXX verify that windows don't overlap
    102 	 * XXX be trickier
    103 	 * XXX magic numbers
    104 	 */
    105 
    106 #if 0 /* should be routine to dump regs */
    107 	printf("old base1  was 0x%x\n", REGVAL(EPIC_PCI_BASE_1));
    108 	printf("old mask1  was 0x%x\n", REGVAL(EPIC_PCI_MASK_1));
    109 	printf("old tbase1 was 0x%x\n", REGVAL(EPIC_TBASE_1));
    110 
    111 	printf("old base2  was 0x%x\n", REGVAL(EPIC_PCI_BASE_2));
    112 	printf("old mask2  was 0x%x\n", REGVAL(EPIC_PCI_MASK_2));
    113 	printf("old tbase2 was 0x%x\n", REGVAL(EPIC_TBASE_2));
    114 #endif
    115 
    116 #if 0 /* XXX STUPID PROM; MUST LEAVE WINDOW 2 ALONE.  See above */
    117         /* Turn off DMA window enables in PCI Base Reg 2. */
    118         REGVAL(EPIC_PCI_BASE_2) = 0;
    119 
    120         /* Set up Translated Base Register 2; translate to sybBus addr 0. */
    121 	REGVAL(EPIC_TBASE_2) = 0;
    122 
    123 	/* Set up PCI mask register 2; map 1G space. */
    124 	REGVAL(EPIC_PCI_MASK_2) = 0x3ff00000;
    125 
    126 	/* Enable window 2; from PCI address 4G, direct mapped. */
    127 	REGVAL(EPIC_PCI_BASE_2) = 0x40080000;
    128 #endif /* STUPID PROM */
    129 
    130         /* Turn off DMA window enables in PCI Base Reg 1. */
    131         REGVAL(EPIC_PCI_BASE_1) = 0;
    132 
    133         /* Set up Translated Base Register 1; translate to sybBus addr 0. */
    134 { /* XXX */
    135 extern struct sgmapent *sgmap;
    136 	REGVAL(EPIC_TBASE_1) = vtophys(sgmap) >> 1;
    137 } /* XXX */
    138 
    139 	/* Set up PCI mask register 1; map 8MB space. */
    140 	REGVAL(EPIC_PCI_MASK_1) = 0x00700000;
    141 
    142 	/* Enable window 1; from PCI address 8MB, direct mapped. */
    143 	REGVAL(EPIC_PCI_BASE_1) = 0x008c0000;
    144 
    145 	/*
    146 	 * Should set up HAXR1 and HAXR2...  However, the PROM again
    147 	 * wants them where they're set to be...
    148 	 */
    149 #if 0
    150 	printf("old haxr0  was 0x%x\n", REGVAL(EPIC_HAXR0));
    151 	printf("old haxr1  was 0x%x\n", REGVAL(EPIC_HAXR1));
    152 	printf("old haxr2  was 0x%x\n", REGVAL(EPIC_HAXR2));
    153 #endif
    154 
    155 #if 0 /* XXX STUPID PROM */
    156 	/* HAXR0 is wired zero; no op. */
    157 	REGVAL(EPIC_HAXR0) = 0;
    158 
    159 	/* HAXR1: maps PCI memory space above 16M.  16M -> 2G+16M. */
    160 	REGVAL(EPIC_HAXR1) = 0x80000000;
    161 
    162 	/* HAXR2: maps PCI I/O space above 256K.  256K -> 256k. */
    163 	REGVAL(EPIC_HAXR2) = 0;
    164 #endif
    165 }
    166 
    167 pcitag_t
    168 apecs_make_tag(bus, device, function)
    169 	int bus, device, function;
    170 {
    171 	pcitag_t tag;
    172 
    173 	if (bus >= 256 || device >= 32 || function >= 8)
    174 		panic("apecs_make_tag: bad request");
    175 
    176 	tag = (bus << 21) | (device << 16) | (function << 13);
    177 #if 0
    178 	printf("apecs_make_tag: bus %d, device %d, function %d -> 0x%lx\n", bus,
    179 	    device, function, tag);
    180 #endif
    181 	return tag;
    182 }
    183 
    184 pcireg_t
    185 apecs_conf_read(tag, offset)
    186 	pcitag_t tag;
    187 	int offset;					/* XXX */
    188 {
    189 	pcireg_t *datap, data;
    190 	int reg = offset >> 2;				/* XXX */
    191 
    192 	if ((tag & 0x1fe00000) != 0) {
    193 		panic("apecs_conf_read: bus != 0?");
    194 	}
    195 	/* XXX FILL IN HAXR2 bits. */
    196 
    197 	datap = (pcireg_t *)
    198 	    phystok0seg(APECS_PCI_CONF | tag | reg << 7 | 0 << 5 | 0x3 << 3);
    199 	if (badaddr(datap, sizeof *datap))
    200 		return ((pcireg_t)-1);
    201 	data = *datap;
    202 #if 0
    203 	printf("apecs_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p\n", tag, reg,
    204 	    data, datap);
    205 #endif
    206 	return data;
    207 }
    208 
    209 void
    210 apecs_conf_write(tag, offset, data)
    211 	pcitag_t tag;
    212 	int offset;					/* XXX */
    213 	pcireg_t data;
    214 {
    215 	pcireg_t *datap;
    216 	int reg = offset >> 2;				/* XXX */
    217 
    218 	if ((tag & 0x1fe00000) != 0) {
    219 		panic("apecs_conf_read: bus != 0?");
    220 	}
    221 	/* XXX FILL IN HAXR2 bits. */
    222 
    223 	datap = (pcireg_t *)
    224 	    phystok0seg(APECS_PCI_CONF | tag | reg << 7 | 0 << 5 | 0x3 << 3);
    225 #if 0
    226 	printf("apecs_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
    227 	    reg, data, datap);
    228 #endif
    229 	*datap = data;
    230 }
    231 
    232 int
    233 apecs_map_io(tag, reg, iobasep)
    234 	pcitag_t tag;
    235 	int reg;
    236 	int *iobasep;
    237 {
    238 	pcireg_t data;
    239 	int pci_iobase;
    240 
    241 	if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3))
    242 		panic("apecs_map_io: bad request");
    243 
    244 	data = pci_conf_read(tag, reg);
    245 
    246 	if ((data & PCI_MAP_IO) == 0)
    247 		panic("apecs_map_io: attempt to I/O map an memory region");
    248 
    249 	/* figure out where it was mapped... */
    250 	pci_iobase = data & PCI_MAP_MEMORY_ADDRESS_MASK; /* PCI I/O addr */
    251 
    252 	return (pci_iobase);
    253 }
    254 
    255 int
    256 apecs_map_mem(tag, reg, vap, pap)
    257 	pcitag_t tag;
    258 	int reg;
    259 	vm_offset_t *vap, *pap;
    260 {
    261 	pcireg_t data;
    262 	vm_offset_t pci_pa, sb_pa;
    263 
    264 	if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3))
    265 		panic("apecs_map_mem: bad request");
    266 
    267 	/*
    268 	 * "HERE WE GO AGAIN!!!"
    269 	 *
    270 	 * The PROM has already mapped the device for us.  The PROM is
    271 	 * our friend.  We wouldn't want to make the PROM unhappy.
    272 	 *
    273 	 * So, we take the address that's been assigned (already) to
    274 	 * the register, and figure out what physical and virtual addresses
    275 	 * go with it...
    276 	 */
    277 	/*
    278 	 * Section 6.2.5.1, `Address Maps', says that a device which wants 2^n
    279 	 * bytes of memory will hardwire the bottom n bits of the address to 0.
    280 	 * As recommended, we write all 1s and see what we get back.
    281 	 */
    282 	data = pci_conf_read(tag, reg);
    283 
    284 	if (data & PCI_MAP_IO)
    285 		panic("apecs_map_mem: attempt to memory map an I/O region");
    286 
    287 	switch (data & PCI_MAP_MEMORY_TYPE_MASK) {
    288 	case PCI_MAP_MEMORY_TYPE_32BIT:
    289 		break;
    290 	case PCI_MAP_MEMORY_TYPE_32BIT_1M:
    291 		printf("apecs_map_mem: attempt to map restricted 32-bit region\n");
    292 		return EOPNOTSUPP;
    293 	case PCI_MAP_MEMORY_TYPE_64BIT:
    294 		printf("apecs_map_mem: attempt to map 64-bit region\n");
    295 		return EOPNOTSUPP;
    296 	default:
    297 		printf("apecs_map_mem: reserved mapping type\n");
    298 		return EINVAL;
    299 	}
    300 
    301 	/* figure out where it was mapped... */
    302 	pci_pa = data & PCI_MAP_MEMORY_ADDRESS_MASK;	/* PCI bus address */
    303 
    304 	/* calcluate sysBus address -- should be a better way to get space */
    305 	if (data & PCI_MAP_MEMORY_CACHABLE) {
    306 		/* Dense space */
    307 		sb_pa = (pci_pa & 0xffffffff) | (3L << 32);	/* XXX */
    308 	} else {
    309 		/* Sparse space */
    310 		sb_pa = ((pci_pa & 0x7ffffff) << 5) | (2L << 32); /* XXX */
    311 	}
    312 
    313 	/* and tell the driver. */
    314 	*vap = phystok0seg(sb_pa);
    315 	*pap = pci_pa;
    316 
    317 #if 0
    318 	printf("pci_map_mem: memory mapped at 0x%lx\n", *pap);
    319 	printf("pci_map_mem: virtual 0x%lx\n", *vap);
    320 #endif
    321 
    322 	return 0;
    323 }
    324 
    325 int
    326 apecs_pcidma_map(addr, size, mappings)
    327 	caddr_t addr;
    328 	vm_size_t size;
    329 	vm_offset_t *mappings;
    330 {
    331 	vm_offset_t va;
    332 	long todo;
    333 	int i;
    334 
    335 	i = 0;
    336 	va = (vm_offset_t)addr;
    337 	todo = size;
    338 
    339 	while (todo > 0) {
    340 		mappings[i] = vtophys(va) | 0x40000000;
    341 #if 0
    342 		printf("a_pd_m mapping %d: %lx -> %lx -> %lx\n", i, va,
    343 		    vtophys(va), mappings[i]);
    344 #endif
    345 		i++;
    346 		todo -= PAGE_SIZE - (va - trunc_page(va));
    347 		va += PAGE_SIZE - (va - trunc_page(va));
    348 	}
    349 	return (i);
    350 }
    351 
    352 void
    353 apecs_pcidma_unmap(addr, size, nmappings, mappings)
    354 	caddr_t addr;
    355 	vm_size_t size;
    356 	int nmappings;
    357 	vm_offset_t *mappings;
    358 {
    359 
    360 	/* maybe XXX if diagnostic, check that mapping happened. */
    361 	printf("apecs_pcidma_unmap: nada\n");
    362 }
    363