apecs_pci.c revision 1.26 1 /* $NetBSD: apecs_pci.c,v 1.26 2015/10/02 05:22:49 msaitoh Exp $ */
2
3 /*
4 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 * All rights reserved.
6 *
7 * Author: Chris G. Demetriou
8 *
9 * Permission to use, copy, modify and distribute this software and
10 * its documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation.
14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 *
19 * Carnegie Mellon requests users of this software to return to
20 *
21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 * School of Computer Science
23 * Carnegie Mellon University
24 * Pittsburgh PA 15213-3890
25 *
26 * any improvements or extensions that they make and grant Carnegie the
27 * rights to redistribute these changes.
28 */
29
30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
31
32 __KERNEL_RCSID(0, "$NetBSD: apecs_pci.c,v 1.26 2015/10/02 05:22:49 msaitoh Exp $");
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/device.h>
38
39 #include <dev/pci/pcireg.h>
40 #include <dev/pci/pcivar.h>
41 #include <alpha/pci/apecsreg.h>
42 #include <alpha/pci/apecsvar.h>
43
44 void apecs_attach_hook(device_t, device_t,
45 struct pcibus_attach_args *);
46 int apecs_bus_maxdevs(void *, int);
47 pcitag_t apecs_make_tag(void *, int, int, int);
48 void apecs_decompose_tag(void *, pcitag_t, int *, int *, int *);
49 pcireg_t apecs_conf_read(void *, pcitag_t, int);
50 void apecs_conf_write(void *, pcitag_t, int, pcireg_t);
51
52 void
53 apecs_pci_init(pci_chipset_tag_t pc, void *v)
54 {
55
56 pc->pc_conf_v = v;
57 pc->pc_attach_hook = apecs_attach_hook;
58 pc->pc_bus_maxdevs = apecs_bus_maxdevs;
59 pc->pc_make_tag = apecs_make_tag;
60 pc->pc_decompose_tag = apecs_decompose_tag;
61 pc->pc_conf_read = apecs_conf_read;
62 pc->pc_conf_write = apecs_conf_write;
63 }
64
65 void
66 apecs_attach_hook(device_t parent, device_t self, struct pcibus_attach_args *pba)
67 {
68 }
69
70 int
71 apecs_bus_maxdevs(void *cpv, int busno)
72 {
73
74 return 32;
75 }
76
77 pcitag_t
78 apecs_make_tag(void *cpv, int b, int d, int f)
79 {
80
81 return (b << 16) | (d << 11) | (f << 8);
82 }
83
84 void
85 apecs_decompose_tag(void *cpv, pcitag_t tag, int *bp, int *dp, int *fp)
86 {
87
88 if (bp != NULL)
89 *bp = (tag >> 16) & 0xff;
90 if (dp != NULL)
91 *dp = (tag >> 11) & 0x1f;
92 if (fp != NULL)
93 *fp = (tag >> 8) & 0x7;
94 }
95
96 pcireg_t
97 apecs_conf_read(void *cpv, pcitag_t tag, int offset)
98 {
99 struct apecs_config *acp = cpv;
100 pcireg_t *datap, data;
101 int s, secondary, ba;
102 int32_t old_haxr2; /* XXX */
103
104 if ((unsigned int)offset >= PCI_CONF_SIZE)
105 return (pcireg_t) -1;
106
107 s = 0; /* XXX gcc -Wuninitialized */
108 old_haxr2 = 0; /* XXX gcc -Wuninitialized */
109
110 /* secondary if bus # != 0 */
111 pci_decompose_tag(&acp->ac_pc, tag, &secondary, 0, 0);
112 if (secondary) {
113 s = splhigh();
114 old_haxr2 = REGVAL(EPIC_HAXR2);
115 alpha_mb();
116 REGVAL(EPIC_HAXR2) = old_haxr2 | 0x1;
117 alpha_mb();
118 }
119
120 datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(APECS_PCI_CONF |
121 tag << 5UL | /* XXX */
122 (offset & ~0x03) << 5 | /* XXX */
123 0 << 5 | /* XXX */
124 0x3 << 3); /* XXX */
125 data = (pcireg_t)-1;
126 if (!(ba = badaddr(datap, sizeof *datap)))
127 data = *datap;
128
129 if (secondary) {
130 alpha_mb();
131 REGVAL(EPIC_HAXR2) = old_haxr2;
132 alpha_mb();
133 splx(s);
134 }
135
136 #if 0
137 printf("apecs_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
138 data, datap, ba ? " (badaddr)" : "");
139 #endif
140
141 return data;
142 }
143
144 void
145 apecs_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
146 {
147 struct apecs_config *acp = cpv;
148 pcireg_t *datap;
149 int s, secondary;
150 int32_t old_haxr2; /* XXX */
151
152 if ((unsigned int)offset >= PCI_CONF_SIZE)
153 return;
154
155 s = 0; /* XXX gcc -Wuninitialized */
156 old_haxr2 = 0; /* XXX gcc -Wuninitialized */
157
158 /* secondary if bus # != 0 */
159 pci_decompose_tag(&acp->ac_pc, tag, &secondary, 0, 0);
160 if (secondary) {
161 s = splhigh();
162 old_haxr2 = REGVAL(EPIC_HAXR2);
163 alpha_mb();
164 REGVAL(EPIC_HAXR2) = old_haxr2 | 0x1;
165 alpha_mb();
166 }
167
168 datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(APECS_PCI_CONF |
169 tag << 5UL | /* XXX */
170 (offset & ~0x03) << 5 | /* XXX */
171 0 << 5 | /* XXX */
172 0x3 << 3); /* XXX */
173
174 alpha_mb();
175 *datap = data;
176 alpha_mb();
177 alpha_mb();
178
179 if (secondary) {
180 alpha_mb();
181 REGVAL(EPIC_HAXR2) = old_haxr2;
182 alpha_mb();
183 splx(s);
184 }
185
186 #if 0
187 printf("apecs_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
188 reg, data, datap);
189 #endif
190 }
191