apecs_pci.c revision 1.4
1 /* $NetBSD: apecs_pci.c,v 1.4 1995/11/23 02:37:16 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/device.h> 34 #include <vm/vm.h> 35 36 #include <dev/pci/pcireg.h> 37 #include <dev/pci/pcivar.h> 38 #include <alpha/pci/apecsreg.h> 39 #include <alpha/pci/apecsvar.h> 40 41 pci_confreg_t apecs_conf_read __P((void *, pci_conftag_t, pci_confoffset_t)); 42 void apecs_conf_write __P((void *, pci_conftag_t, 43 pci_confoffset_t, pci_confreg_t)); 44 int apecs_find_io __P((void *, pci_conftag_t, 45 pci_confoffset_t, pci_iooffset_t *, pci_iosize_t *)); 46 int apecs_find_mem __P((void *, pci_conftag_t, 47 pci_confoffset_t, pci_moffset_t *, pci_msize_t *, int *)); 48 49 __const struct pci_conf_fns apecs_conf_fns = { 50 apecs_conf_read, 51 apecs_conf_write, 52 apecs_find_io, 53 apecs_find_mem, 54 }; 55 56 pci_confreg_t 57 apecs_conf_read(cpv, tag, offset) 58 void *cpv; 59 pci_conftag_t tag; 60 pci_confoffset_t offset; 61 { 62 struct apecs_config *acp = cpv; 63 pci_confreg_t *datap, data; 64 int s, secondary, ba; 65 int32_t old_haxr2; /* XXX */ 66 67 secondary = PCI_TAG_BUS(tag) != 0; 68 if (secondary) { 69 s = splhigh(); 70 old_haxr2 = REGVAL(EPIC_HAXR2); 71 wbflush(); 72 REGVAL(EPIC_HAXR2) = old_haxr2 | 0x1; 73 wbflush(); 74 } 75 76 datap = (pci_confreg_t *)phystok0seg(APECS_PCI_CONF | 77 tag << 5UL | /* XXX */ 78 (offset & ~0x03) << 5 | /* XXX */ 79 0 << 5 | /* XXX */ 80 0x3 << 3); /* XXX */ 81 data = (pci_confreg_t)-1; 82 if (!(ba = badaddr(datap, sizeof *datap))) 83 data = *datap; 84 85 if (secondary) { 86 wbflush(); 87 REGVAL(EPIC_HAXR2) = old_haxr2; 88 wbflush(); 89 splx(s); 90 } 91 92 #if 0 93 printf("apecs_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg, 94 data, datap, ba ? " (badaddr)" : ""); 95 #endif 96 97 return data; 98 } 99 100 void 101 apecs_conf_write(cpv, tag, offset, data) 102 void *cpv; 103 pci_conftag_t tag; 104 pci_confoffset_t offset; 105 pci_confreg_t data; 106 { 107 struct apecs_config *acp = cpv; 108 pci_confreg_t *datap; 109 int s, secondary; 110 int32_t old_haxr2; /* XXX */ 111 112 secondary = PCI_TAG_BUS(tag) != 0; 113 if (secondary) { 114 s = splhigh(); 115 old_haxr2 = REGVAL(EPIC_HAXR2); 116 wbflush(); 117 REGVAL(EPIC_HAXR2) = old_haxr2 | 0x1; 118 wbflush(); 119 } 120 121 datap = (pci_confreg_t *)phystok0seg(APECS_PCI_CONF | 122 tag << 5UL | /* XXX */ 123 (offset & ~0x03) << 5 | /* XXX */ 124 0 << 5 | /* XXX */ 125 0x3 << 3); /* XXX */ 126 *datap = data; 127 128 if (secondary) { 129 wbflush(); 130 REGVAL(EPIC_HAXR2) = old_haxr2; 131 wbflush(); 132 splx(s); 133 } 134 135 #if 0 136 printf("apecs_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag, 137 reg, data, datap); 138 #endif 139 } 140 141 int 142 apecs_find_io(cpv, tag, reg, iobasep, sizep) 143 void *cpv; 144 pci_conftag_t tag; 145 pci_confoffset_t reg; 146 pci_iooffset_t *iobasep; 147 pci_iosize_t *sizep; 148 { 149 struct apecs_config *acp = cpv; 150 pci_confreg_t addrdata, sizedata; 151 pci_iooffset_t pci_iobase; 152 153 if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3)) 154 panic("apecs_map_io: bad request"); 155 156 addrdata = PCI_CONF_READ(acp->ac_conffns, acp->ac_confarg, tag, reg); 157 158 PCI_CONF_WRITE(acp->ac_conffns, acp->ac_confarg, tag, reg, 0xffffffff); 159 sizedata = PCI_CONF_READ(acp->ac_conffns, acp->ac_confarg, tag, reg); 160 PCI_CONF_WRITE(acp->ac_conffns, acp->ac_confarg, tag, reg, addrdata); 161 162 if (PCI_MAPREG_TYPE(addrdata) == PCI_MAPREG_TYPE_MEM) 163 panic("apecs_map_io: attempt to I/O map an memory region"); 164 165 if (iobasep != NULL) 166 *iobasep = PCI_MAPREG_IO_ADDRESS(addrdata); 167 if (sizep != NULL) 168 *sizep = ~PCI_MAPREG_IO_ADDRESS(sizedata) + 1; 169 170 return (0); 171 } 172 173 int 174 apecs_find_mem(cpv, tag, reg, paddrp, sizep, cacheablep) 175 void *cpv; 176 pci_conftag_t tag; 177 pci_confoffset_t reg; 178 pci_moffset_t *paddrp; 179 pci_msize_t *sizep; 180 int *cacheablep; 181 { 182 struct apecs_config *acp = cpv; 183 pci_confreg_t addrdata, sizedata; 184 185 if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3)) 186 panic("apecs_map_mem: bad request"); 187 188 /* 189 * The PROM has mapped the device for us. We take the address 190 * that's been assigned to the register, and figure out what 191 * physical and virtual addresses go with it... 192 */ 193 addrdata = PCI_CONF_READ(acp->ac_conffns, acp->ac_confarg, tag, reg); 194 195 PCI_CONF_WRITE(acp->ac_conffns, acp->ac_confarg, tag, reg, 0xffffffff); 196 sizedata = PCI_CONF_READ(acp->ac_conffns, acp->ac_confarg, tag, reg); 197 PCI_CONF_WRITE(acp->ac_conffns, acp->ac_confarg, tag, reg, addrdata); 198 199 if (PCI_MAPREG_TYPE(addrdata) == PCI_MAPREG_TYPE_IO) 200 panic("apecs_map_mem: attempt to memory map an I/O region"); 201 202 switch (PCI_MAPREG_MEM_TYPE(addrdata)) { 203 case PCI_MAPREG_MEM_TYPE_32BIT: 204 case PCI_MAPREG_MEM_TYPE_32BIT_1M: 205 break; 206 case PCI_MAPREG_MEM_TYPE_64BIT: 207 /* XXX */ printf("apecs_map_mem: attempt to map 64-bit region\n"); 208 /* XXX */ break; 209 default: 210 printf("apecs_map_mem: reserved mapping type\n"); 211 return EINVAL; 212 } 213 214 if (paddrp != NULL) 215 *paddrp = PCI_MAPREG_MEM_ADDRESS(addrdata); /* PCI addr */ 216 if (sizep != NULL) 217 *sizep = ~PCI_MAPREG_MEM_ADDRESS(sizedata) + 1; 218 if (cacheablep != NULL) 219 *cacheablep = PCI_MAPREG_MEM_CACHEABLE(addrdata); 220 221 return 0; 222 } 223
Indexes created Tue Sep 23 23:09:58 GMT 2025