cia.c revision 1.37 1 1.37 thorpej /* $NetBSD: cia.c,v 1.37 1998/06/04 21:34:45 thorpej Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.4 cgd * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 cgd * All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Author: Chris G. Demetriou
8 1.1 cgd *
9 1.1 cgd * Permission to use, copy, modify and distribute this software and
10 1.1 cgd * its documentation is hereby granted, provided that both the copyright
11 1.1 cgd * notice and this permission notice appear in all copies of the
12 1.1 cgd * software, derivative works or modified versions, and any portions
13 1.1 cgd * thereof, and that both notices appear in supporting documentation.
14 1.1 cgd *
15 1.1 cgd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 cgd * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 cgd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 cgd *
19 1.1 cgd * Carnegie Mellon requests users of this software to return to
20 1.1 cgd *
21 1.1 cgd * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 cgd * School of Computer Science
23 1.1 cgd * Carnegie Mellon University
24 1.1 cgd * Pittsburgh PA 15213-3890
25 1.1 cgd *
26 1.1 cgd * any improvements or extensions that they make and grant Carnegie the
27 1.1 cgd * rights to redistribute these changes.
28 1.1 cgd */
29 1.18 cgd
30 1.25 thorpej #include "opt_dec_eb164.h"
31 1.25 thorpej #include "opt_dec_kn20aa.h"
32 1.25 thorpej
33 1.19 cgd #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
34 1.19 cgd
35 1.37 thorpej __KERNEL_RCSID(0, "$NetBSD: cia.c,v 1.37 1998/06/04 21:34:45 thorpej Exp $");
36 1.1 cgd
37 1.1 cgd #include <sys/param.h>
38 1.1 cgd #include <sys/systm.h>
39 1.1 cgd #include <sys/kernel.h>
40 1.1 cgd #include <sys/malloc.h>
41 1.1 cgd #include <sys/device.h>
42 1.1 cgd #include <vm/vm.h>
43 1.1 cgd
44 1.1 cgd #include <machine/autoconf.h>
45 1.1 cgd #include <machine/rpb.h>
46 1.1 cgd
47 1.1 cgd #include <dev/isa/isareg.h>
48 1.1 cgd #include <dev/isa/isavar.h>
49 1.1 cgd
50 1.1 cgd #include <dev/pci/pcireg.h>
51 1.1 cgd #include <dev/pci/pcivar.h>
52 1.1 cgd #include <alpha/pci/ciareg.h>
53 1.1 cgd #include <alpha/pci/ciavar.h>
54 1.17 cgd #ifdef DEC_KN20AA
55 1.1 cgd #include <alpha/pci/pci_kn20aa.h>
56 1.1 cgd #endif
57 1.17 cgd #ifdef DEC_EB164
58 1.13 cgd #include <alpha/pci/pci_eb164.h>
59 1.13 cgd #endif
60 1.1 cgd
61 1.15 cgd int ciamatch __P((struct device *, struct cfdata *, void *));
62 1.1 cgd void ciaattach __P((struct device *, struct device *, void *));
63 1.1 cgd
64 1.5 cgd struct cfattach cia_ca = {
65 1.5 cgd sizeof(struct cia_softc), ciamatch, ciaattach,
66 1.5 cgd };
67 1.5 cgd
68 1.29 thorpej extern struct cfdriver cia_cd;
69 1.1 cgd
70 1.9 cgd static int ciaprint __P((void *, const char *pnp));
71 1.1 cgd
72 1.1 cgd /* There can be only one. */
73 1.1 cgd int ciafound;
74 1.1 cgd struct cia_config cia_configuration;
75 1.1 cgd
76 1.37 thorpej /*
77 1.37 thorpej * This determines if we attempt to use BWX for PCI bus and config space
78 1.37 thorpej * access. Some systems, notably with Pyxis, don't fare so well unless
79 1.37 thorpej * BWX is used.
80 1.37 thorpej */
81 1.37 thorpej #ifndef CIA_USE_BWX
82 1.37 thorpej #define CIA_USE_BWX 1
83 1.37 thorpej #endif
84 1.37 thorpej
85 1.37 thorpej int cia_use_bwx = CIA_USE_BWX;
86 1.37 thorpej
87 1.1 cgd int
88 1.1 cgd ciamatch(parent, match, aux)
89 1.1 cgd struct device *parent;
90 1.15 cgd struct cfdata *match;
91 1.15 cgd void *aux;
92 1.1 cgd {
93 1.35 thorpej struct mainbus_attach_args *ma = aux;
94 1.1 cgd
95 1.1 cgd /* Make sure that we're looking for a CIA. */
96 1.35 thorpej if (strcmp(ma->ma_name, cia_cd.cd_name) != 0)
97 1.1 cgd return (0);
98 1.1 cgd
99 1.1 cgd if (ciafound)
100 1.1 cgd return (0);
101 1.1 cgd
102 1.1 cgd return (1);
103 1.1 cgd }
104 1.1 cgd
105 1.1 cgd /*
106 1.1 cgd * Set up the chipset's function pointers.
107 1.1 cgd */
108 1.1 cgd void
109 1.14 cgd cia_init(ccp, mallocsafe)
110 1.1 cgd struct cia_config *ccp;
111 1.14 cgd int mallocsafe;
112 1.1 cgd {
113 1.1 cgd
114 1.6 cgd ccp->cc_hae_mem = REGVAL(CIA_CSR_HAE_MEM);
115 1.6 cgd ccp->cc_hae_io = REGVAL(CIA_CSR_HAE_IO);
116 1.36 thorpej ccp->cc_rev = REGVAL(CIA_CSR_REV) & REV_MASK;
117 1.36 thorpej
118 1.36 thorpej /*
119 1.36 thorpej * Determine if we have a Pyxis. Only two systypes can
120 1.36 thorpej * have this: the EB164 systype (AlphaPC164LX and AlphaPC164SX)
121 1.36 thorpej * and the DEC_550 systype (Miata).
122 1.36 thorpej */
123 1.36 thorpej if ((hwrpb->rpb_type == ST_EB164 &&
124 1.36 thorpej (hwrpb->rpb_variation & SV_ST_MASK) >= SV_ST_ALPHAPC164LX_400) ||
125 1.36 thorpej hwrpb->rpb_type == ST_DEC_550)
126 1.36 thorpej ccp->cc_flags |= CCF_ISPYXIS;
127 1.27 thorpej
128 1.27 thorpej /*
129 1.27 thorpej * Revisions >= 2 have the CNFG register.
130 1.27 thorpej */
131 1.27 thorpej if (ccp->cc_rev >= 2)
132 1.27 thorpej ccp->cc_cnfg = REGVAL(CIA_CSR_CNFG);
133 1.27 thorpej else
134 1.27 thorpej ccp->cc_cnfg = 0;
135 1.12 cgd
136 1.37 thorpej /*
137 1.37 thorpej * Use BWX iff:
138 1.37 thorpej *
139 1.37 thorpej * - It hasn't been disbled by the user,
140 1.37 thorpej * - it's enabled in CNFG,
141 1.37 thorpej * - we're implementation version ev5,
142 1.37 thorpej * - BWX is enabled in the CPU's capabilities mask (yes,
143 1.37 thorpej * the bit is really cleared if the capability exists...)
144 1.37 thorpej */
145 1.37 thorpej if (cia_use_bwx != 0 &&
146 1.37 thorpej (ccp->cc_cnfg & CNFG_BWEN) != 0 &&
147 1.37 thorpej alpha_implver() == ALPHA_IMPLVER_EV5 &&
148 1.37 thorpej alpha_amask(ALPHA_AMASK_BWX) == 0)
149 1.37 thorpej ccp->cc_flags |= CCF_USEBWX;
150 1.37 thorpej
151 1.14 cgd if (!ccp->cc_initted) {
152 1.14 cgd /* don't do these twice since they set up extents */
153 1.37 thorpej if (ccp->cc_flags & CCF_USEBWX) {
154 1.37 thorpej cia_bwx_bus_io_init(&ccp->cc_iot, ccp);
155 1.37 thorpej cia_bwx_bus_mem_init(&ccp->cc_memt, ccp);
156 1.37 thorpej } else {
157 1.37 thorpej cia_swiz_bus_io_init(&ccp->cc_iot, ccp);
158 1.37 thorpej cia_swiz_bus_mem_init(&ccp->cc_memt, ccp);
159 1.37 thorpej }
160 1.14 cgd }
161 1.14 cgd ccp->cc_mallocsafe = mallocsafe;
162 1.14 cgd
163 1.14 cgd cia_pci_init(&ccp->cc_pc, ccp);
164 1.14 cgd
165 1.21 thorpej cia_dma_init(ccp);
166 1.14 cgd
167 1.14 cgd ccp->cc_initted = 1;
168 1.1 cgd }
169 1.1 cgd
170 1.1 cgd void
171 1.1 cgd ciaattach(parent, self, aux)
172 1.1 cgd struct device *parent, *self;
173 1.1 cgd void *aux;
174 1.1 cgd {
175 1.1 cgd struct cia_softc *sc = (struct cia_softc *)self;
176 1.1 cgd struct cia_config *ccp;
177 1.5 cgd struct pcibus_attach_args pba;
178 1.28 thorpej char bits[64];
179 1.1 cgd
180 1.1 cgd /* note that we've attached the chipset; can't have 2 CIAs. */
181 1.1 cgd ciafound = 1;
182 1.1 cgd
183 1.1 cgd /*
184 1.1 cgd * set up the chipset's info; done once at console init time
185 1.21 thorpej * (maybe), but we must do it here as well to take care of things
186 1.21 thorpej * that need to use memory allocation.
187 1.1 cgd */
188 1.1 cgd ccp = sc->sc_ccp = &cia_configuration;
189 1.14 cgd cia_init(ccp, 1);
190 1.1 cgd
191 1.36 thorpej printf(": DECchip 2117x Core Logic Chipset (%s), pass %d\n",
192 1.36 thorpej (ccp->cc_flags & CCF_ISPYXIS) ? "Pyxis" : "ALCOR/ALCOR2",
193 1.36 thorpej ccp->cc_rev + 1);
194 1.28 thorpej if (ccp->cc_cnfg)
195 1.28 thorpej printf("%s: extended capabilities: %s\n", self->dv_xname,
196 1.28 thorpej bitmask_snprintf(ccp->cc_cnfg, CIA_CSR_CNFG_BITS,
197 1.28 thorpej bits, sizeof(bits)));
198 1.37 thorpej #if 1
199 1.37 thorpej if (ccp->cc_flags & CCF_USEBWX)
200 1.37 thorpej printf("%s: using BWX for PCI config and device access\n",
201 1.37 thorpej self->dv_xname);
202 1.37 thorpej #endif
203 1.1 cgd
204 1.1 cgd switch (hwrpb->rpb_type) {
205 1.17 cgd #ifdef DEC_KN20AA
206 1.1 cgd case ST_DEC_KN20AA:
207 1.5 cgd pci_kn20aa_pickintr(ccp);
208 1.1 cgd #ifdef EVCNT_COUNTERS
209 1.1 cgd evcnt_attach(self, "intr", &kn20aa_intr_evcnt);
210 1.1 cgd #endif
211 1.1 cgd break;
212 1.1 cgd #endif
213 1.13 cgd
214 1.17 cgd #ifdef DEC_EB164
215 1.13 cgd case ST_EB164:
216 1.13 cgd pci_eb164_pickintr(ccp);
217 1.13 cgd #ifdef EVCNT_COUNTERS
218 1.13 cgd evcnt_attach(self, "intr", &eb164_intr_evcnt);
219 1.13 cgd #endif
220 1.13 cgd break;
221 1.13 cgd #endif
222 1.13 cgd
223 1.1 cgd default:
224 1.1 cgd panic("ciaattach: shouldn't be here, really...");
225 1.1 cgd }
226 1.1 cgd
227 1.5 cgd pba.pba_busname = "pci";
228 1.23 thorpej pba.pba_iot = &ccp->cc_iot;
229 1.23 thorpej pba.pba_memt = &ccp->cc_memt;
230 1.30 thorpej pba.pba_dmat =
231 1.30 thorpej alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI);
232 1.5 cgd pba.pba_pc = &ccp->cc_pc;
233 1.5 cgd pba.pba_bus = 0;
234 1.20 cgd pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
235 1.5 cgd config_found(self, &pba, ciaprint);
236 1.1 cgd }
237 1.1 cgd
238 1.1 cgd static int
239 1.1 cgd ciaprint(aux, pnp)
240 1.1 cgd void *aux;
241 1.9 cgd const char *pnp;
242 1.1 cgd {
243 1.5 cgd register struct pcibus_attach_args *pba = aux;
244 1.1 cgd
245 1.1 cgd /* only PCIs can attach to CIAs; easy. */
246 1.1 cgd if (pnp)
247 1.11 christos printf("%s at %s", pba->pba_busname, pnp);
248 1.11 christos printf(" bus %d", pba->pba_bus);
249 1.1 cgd return (UNCONF);
250 1.1 cgd }
251