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cia.c revision 1.45
      1  1.45      ross /* $NetBSD: cia.c,v 1.45 1998/06/26 21:45:56 ross Exp $ */
      2  1.42   thorpej 
      3  1.42   thorpej /*-
      4  1.42   thorpej  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  1.42   thorpej  * All rights reserved.
      6  1.42   thorpej  *
      7  1.42   thorpej  * This code is derived from software contributed to The NetBSD Foundation
      8  1.42   thorpej  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  1.42   thorpej  * NASA Ames Research Center.
     10  1.42   thorpej  *
     11  1.42   thorpej  * Redistribution and use in source and binary forms, with or without
     12  1.42   thorpej  * modification, are permitted provided that the following conditions
     13  1.42   thorpej  * are met:
     14  1.42   thorpej  * 1. Redistributions of source code must retain the above copyright
     15  1.42   thorpej  *    notice, this list of conditions and the following disclaimer.
     16  1.42   thorpej  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.42   thorpej  *    notice, this list of conditions and the following disclaimer in the
     18  1.42   thorpej  *    documentation and/or other materials provided with the distribution.
     19  1.42   thorpej  * 3. All advertising materials mentioning features or use of this software
     20  1.42   thorpej  *    must display the following acknowledgement:
     21  1.42   thorpej  *	This product includes software developed by the NetBSD
     22  1.42   thorpej  *	Foundation, Inc. and its contributors.
     23  1.42   thorpej  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  1.42   thorpej  *    contributors may be used to endorse or promote products derived
     25  1.42   thorpej  *    from this software without specific prior written permission.
     26  1.42   thorpej  *
     27  1.42   thorpej  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  1.42   thorpej  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  1.42   thorpej  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  1.42   thorpej  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  1.42   thorpej  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  1.42   thorpej  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  1.42   thorpej  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  1.42   thorpej  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  1.42   thorpej  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  1.42   thorpej  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  1.42   thorpej  * POSSIBILITY OF SUCH DAMAGE.
     38  1.42   thorpej  */
     39   1.1       cgd 
     40   1.1       cgd /*
     41   1.4       cgd  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
     42   1.1       cgd  * All rights reserved.
     43   1.1       cgd  *
     44   1.1       cgd  * Author: Chris G. Demetriou
     45   1.1       cgd  *
     46   1.1       cgd  * Permission to use, copy, modify and distribute this software and
     47   1.1       cgd  * its documentation is hereby granted, provided that both the copyright
     48   1.1       cgd  * notice and this permission notice appear in all copies of the
     49   1.1       cgd  * software, derivative works or modified versions, and any portions
     50   1.1       cgd  * thereof, and that both notices appear in supporting documentation.
     51   1.1       cgd  *
     52   1.1       cgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     53   1.1       cgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     54   1.1       cgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     55   1.1       cgd  *
     56   1.1       cgd  * Carnegie Mellon requests users of this software to return to
     57   1.1       cgd  *
     58   1.1       cgd  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     59   1.1       cgd  *  School of Computer Science
     60   1.1       cgd  *  Carnegie Mellon University
     61   1.1       cgd  *  Pittsburgh PA 15213-3890
     62   1.1       cgd  *
     63   1.1       cgd  * any improvements or extensions that they make and grant Carnegie the
     64   1.1       cgd  * rights to redistribute these changes.
     65   1.1       cgd  */
     66  1.18       cgd 
     67  1.25   thorpej #include "opt_dec_eb164.h"
     68  1.25   thorpej #include "opt_dec_kn20aa.h"
     69  1.39   thorpej #include "opt_dec_550.h"
     70  1.44      ross #include "opt_dec_1000a.h"
     71  1.45      ross #include "opt_dec_1000.h"
     72  1.25   thorpej 
     73  1.19       cgd #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     74  1.19       cgd 
     75  1.45      ross __KERNEL_RCSID(0, "$NetBSD: cia.c,v 1.45 1998/06/26 21:45:56 ross Exp $");
     76   1.1       cgd 
     77   1.1       cgd #include <sys/param.h>
     78   1.1       cgd #include <sys/systm.h>
     79   1.1       cgd #include <sys/kernel.h>
     80   1.1       cgd #include <sys/malloc.h>
     81   1.1       cgd #include <sys/device.h>
     82   1.1       cgd #include <vm/vm.h>
     83   1.1       cgd 
     84   1.1       cgd #include <machine/autoconf.h>
     85   1.1       cgd #include <machine/rpb.h>
     86   1.1       cgd 
     87   1.1       cgd #include <dev/isa/isareg.h>
     88   1.1       cgd #include <dev/isa/isavar.h>
     89   1.1       cgd 
     90   1.1       cgd #include <dev/pci/pcireg.h>
     91   1.1       cgd #include <dev/pci/pcivar.h>
     92   1.1       cgd #include <alpha/pci/ciareg.h>
     93   1.1       cgd #include <alpha/pci/ciavar.h>
     94  1.45      ross 
     95  1.17       cgd #ifdef DEC_KN20AA
     96   1.1       cgd #include <alpha/pci/pci_kn20aa.h>
     97   1.1       cgd #endif
     98  1.17       cgd #ifdef DEC_EB164
     99  1.13       cgd #include <alpha/pci/pci_eb164.h>
    100  1.13       cgd #endif
    101  1.39   thorpej #ifdef DEC_550
    102  1.39   thorpej #include <alpha/pci/pci_550.h>
    103  1.39   thorpej #endif
    104  1.44      ross #ifdef DEC_1000A
    105  1.44      ross #include <alpha/pci/pci_1000a.h>
    106  1.44      ross #endif
    107  1.45      ross #ifdef DEC_1000
    108  1.45      ross #include <alpha/pci/pci_1000.h>
    109  1.45      ross #endif
    110   1.1       cgd 
    111  1.15       cgd int	ciamatch __P((struct device *, struct cfdata *, void *));
    112   1.1       cgd void	ciaattach __P((struct device *, struct device *, void *));
    113   1.1       cgd 
    114   1.5       cgd struct cfattach cia_ca = {
    115   1.5       cgd 	sizeof(struct cia_softc), ciamatch, ciaattach,
    116   1.5       cgd };
    117   1.5       cgd 
    118  1.29   thorpej extern struct cfdriver cia_cd;
    119   1.1       cgd 
    120   1.9       cgd static int	ciaprint __P((void *, const char *pnp));
    121   1.1       cgd 
    122   1.1       cgd /* There can be only one. */
    123   1.1       cgd int ciafound;
    124   1.1       cgd struct cia_config cia_configuration;
    125   1.1       cgd 
    126  1.37   thorpej /*
    127  1.37   thorpej  * This determines if we attempt to use BWX for PCI bus and config space
    128  1.37   thorpej  * access.  Some systems, notably with Pyxis, don't fare so well unless
    129  1.37   thorpej  * BWX is used.
    130  1.37   thorpej  */
    131  1.37   thorpej #ifndef CIA_USE_BWX
    132  1.37   thorpej #define	CIA_USE_BWX	1
    133  1.37   thorpej #endif
    134  1.37   thorpej 
    135  1.37   thorpej int	cia_use_bwx = CIA_USE_BWX;
    136  1.37   thorpej 
    137   1.1       cgd int
    138   1.1       cgd ciamatch(parent, match, aux)
    139   1.1       cgd 	struct device *parent;
    140  1.15       cgd 	struct cfdata *match;
    141  1.15       cgd 	void *aux;
    142   1.1       cgd {
    143  1.35   thorpej 	struct mainbus_attach_args *ma = aux;
    144   1.1       cgd 
    145   1.1       cgd 	/* Make sure that we're looking for a CIA. */
    146  1.35   thorpej 	if (strcmp(ma->ma_name, cia_cd.cd_name) != 0)
    147   1.1       cgd 		return (0);
    148   1.1       cgd 
    149   1.1       cgd 	if (ciafound)
    150   1.1       cgd 		return (0);
    151   1.1       cgd 
    152   1.1       cgd 	return (1);
    153   1.1       cgd }
    154   1.1       cgd 
    155   1.1       cgd /*
    156   1.1       cgd  * Set up the chipset's function pointers.
    157   1.1       cgd  */
    158   1.1       cgd void
    159  1.14       cgd cia_init(ccp, mallocsafe)
    160   1.1       cgd 	struct cia_config *ccp;
    161  1.14       cgd 	int mallocsafe;
    162   1.1       cgd {
    163   1.1       cgd 
    164   1.6       cgd 	ccp->cc_hae_mem = REGVAL(CIA_CSR_HAE_MEM);
    165   1.6       cgd 	ccp->cc_hae_io = REGVAL(CIA_CSR_HAE_IO);
    166  1.36   thorpej 	ccp->cc_rev = REGVAL(CIA_CSR_REV) & REV_MASK;
    167  1.36   thorpej 
    168  1.36   thorpej 	/*
    169  1.36   thorpej 	 * Determine if we have a Pyxis.  Only two systypes can
    170  1.36   thorpej 	 * have this: the EB164 systype (AlphaPC164LX and AlphaPC164SX)
    171  1.36   thorpej 	 * and the DEC_550 systype (Miata).
    172  1.36   thorpej 	 */
    173  1.36   thorpej 	if ((hwrpb->rpb_type == ST_EB164 &&
    174  1.36   thorpej 	     (hwrpb->rpb_variation & SV_ST_MASK) >= SV_ST_ALPHAPC164LX_400) ||
    175  1.36   thorpej 	    hwrpb->rpb_type == ST_DEC_550)
    176  1.36   thorpej 		ccp->cc_flags |= CCF_ISPYXIS;
    177  1.27   thorpej 
    178  1.27   thorpej 	/*
    179  1.40   thorpej 	 * ALCOR/ALCOR2 Revisions >= 2 and Pyxis have the CNFG register.
    180  1.27   thorpej 	 */
    181  1.40   thorpej 	if (ccp->cc_rev >= 2 || (ccp->cc_flags & CCF_ISPYXIS) != 0)
    182  1.27   thorpej 		ccp->cc_cnfg = REGVAL(CIA_CSR_CNFG);
    183  1.27   thorpej 	else
    184  1.27   thorpej 		ccp->cc_cnfg = 0;
    185  1.12       cgd 
    186  1.37   thorpej 	/*
    187  1.37   thorpej 	 * Use BWX iff:
    188  1.37   thorpej 	 *
    189  1.37   thorpej 	 *	- It hasn't been disbled by the user,
    190  1.37   thorpej 	 *	- it's enabled in CNFG,
    191  1.37   thorpej 	 *	- we're implementation version ev5,
    192  1.37   thorpej 	 *	- BWX is enabled in the CPU's capabilities mask (yes,
    193  1.37   thorpej 	 *	  the bit is really cleared if the capability exists...)
    194  1.37   thorpej 	 */
    195  1.37   thorpej 	if (cia_use_bwx != 0 &&
    196  1.37   thorpej 	    (ccp->cc_cnfg & CNFG_BWEN) != 0 &&
    197  1.37   thorpej 	    alpha_implver() == ALPHA_IMPLVER_EV5 &&
    198  1.38   thorpej 	    alpha_amask(ALPHA_AMASK_BWX) == 0) {
    199  1.38   thorpej 		u_int32_t ctrl;
    200  1.38   thorpej 
    201  1.37   thorpej 		ccp->cc_flags |= CCF_USEBWX;
    202  1.38   thorpej 
    203  1.38   thorpej 		/*
    204  1.38   thorpej 		 * For whatever reason, the firmware seems to enable PCI
    205  1.38   thorpej 		 * loopback mode if it also enables BWX.  Make sure it's
    206  1.38   thorpej 		 * enabled if we have an old, buggy firmware rev.
    207  1.38   thorpej 		 */
    208  1.38   thorpej 		alpha_mb();
    209  1.38   thorpej 		ctrl = REGVAL(CIA_CSR_CTRL);
    210  1.38   thorpej 		if ((ctrl & CTRL_PCI_LOOP_EN) == 0) {
    211  1.38   thorpej 			REGVAL(CIA_CSR_CTRL) = ctrl | CTRL_PCI_LOOP_EN;
    212  1.38   thorpej 			alpha_mb();
    213  1.38   thorpej 		}
    214  1.38   thorpej 	}
    215  1.37   thorpej 
    216  1.14       cgd 	if (!ccp->cc_initted) {
    217  1.14       cgd 		/* don't do these twice since they set up extents */
    218  1.37   thorpej 		if (ccp->cc_flags & CCF_USEBWX) {
    219  1.37   thorpej 			cia_bwx_bus_io_init(&ccp->cc_iot, ccp);
    220  1.37   thorpej 			cia_bwx_bus_mem_init(&ccp->cc_memt, ccp);
    221  1.37   thorpej 		} else {
    222  1.37   thorpej 			cia_swiz_bus_io_init(&ccp->cc_iot, ccp);
    223  1.37   thorpej 			cia_swiz_bus_mem_init(&ccp->cc_memt, ccp);
    224  1.37   thorpej 		}
    225  1.14       cgd 	}
    226  1.14       cgd 	ccp->cc_mallocsafe = mallocsafe;
    227  1.14       cgd 
    228  1.14       cgd 	cia_pci_init(&ccp->cc_pc, ccp);
    229  1.14       cgd 
    230  1.14       cgd 	ccp->cc_initted = 1;
    231   1.1       cgd }
    232   1.1       cgd 
    233   1.1       cgd void
    234   1.1       cgd ciaattach(parent, self, aux)
    235   1.1       cgd 	struct device *parent, *self;
    236   1.1       cgd 	void *aux;
    237   1.1       cgd {
    238   1.1       cgd 	struct cia_softc *sc = (struct cia_softc *)self;
    239   1.1       cgd 	struct cia_config *ccp;
    240   1.5       cgd 	struct pcibus_attach_args pba;
    241  1.28   thorpej 	char bits[64];
    242  1.43   thorpej 	const char *name;
    243  1.43   thorpej 	int pass;
    244   1.1       cgd 
    245   1.1       cgd 	/* note that we've attached the chipset; can't have 2 CIAs. */
    246   1.1       cgd 	ciafound = 1;
    247   1.1       cgd 
    248   1.1       cgd 	/*
    249   1.1       cgd 	 * set up the chipset's info; done once at console init time
    250  1.21   thorpej 	 * (maybe), but we must do it here as well to take care of things
    251  1.21   thorpej 	 * that need to use memory allocation.
    252   1.1       cgd 	 */
    253   1.1       cgd 	ccp = sc->sc_ccp = &cia_configuration;
    254  1.14       cgd 	cia_init(ccp, 1);
    255   1.1       cgd 
    256  1.43   thorpej 	if (ccp->cc_flags & CCF_ISPYXIS) {
    257  1.43   thorpej 		name = "Pyxis";
    258  1.43   thorpej 		pass = ccp->cc_rev;
    259  1.43   thorpej 	} else {
    260  1.43   thorpej 		name = "ALCOR/ALCOR2";
    261  1.43   thorpej 		pass = ccp->cc_rev + 1;
    262  1.43   thorpej 	}
    263  1.43   thorpej 
    264  1.36   thorpej 	printf(": DECchip 2117x Core Logic Chipset (%s), pass %d\n",
    265  1.43   thorpej 	    name, pass);
    266  1.28   thorpej 	if (ccp->cc_cnfg)
    267  1.28   thorpej 		printf("%s: extended capabilities: %s\n", self->dv_xname,
    268  1.28   thorpej 		    bitmask_snprintf(ccp->cc_cnfg, CIA_CSR_CNFG_BITS,
    269  1.28   thorpej 		    bits, sizeof(bits)));
    270  1.37   thorpej #if 1
    271  1.37   thorpej 	if (ccp->cc_flags & CCF_USEBWX)
    272  1.37   thorpej 		printf("%s: using BWX for PCI config and device access\n",
    273  1.37   thorpej 		    self->dv_xname);
    274  1.37   thorpej #endif
    275  1.41   thorpej 
    276  1.42   thorpej #ifdef DEC_550
    277  1.42   thorpej 	if (hwrpb->rpb_type == ST_DEC_550 &&
    278  1.42   thorpej 	    (hwrpb->rpb_variation & SV_ST_MASK) < SV_ST_MIATA_1_5) {
    279  1.41   thorpej 		/*
    280  1.42   thorpej 		 * Miata 1 systems have a bug: DMA cannot cross
    281  1.41   thorpej 		 * an 8k boundary!  Make sure PCI read prefetching
    282  1.41   thorpej 		 * is disabled on these chips.  Note that secondary
    283  1.41   thorpej 		 * PCI busses don't have this problem, because of
    284  1.41   thorpej 		 * the way PPBs handle PCI read requests.
    285  1.41   thorpej 		 *
    286  1.42   thorpej 		 * In the 21174 Technical Reference Manual, this is
    287  1.42   thorpej 		 * actually documented as "Pyxis Pass 1", but apparently
    288  1.42   thorpej 		 * there are chips that report themselves as "Pass 1"
    289  1.42   thorpej 		 * which do not have the bug!  Miatas with the Cypress
    290  1.42   thorpej 		 * PCI-ISA bridge (i.e. Miata 1.5 and Miata 2) do not
    291  1.42   thorpej 		 * have the bug, so we use this check.
    292  1.42   thorpej 		 *
    293  1.41   thorpej 		 * XXX We also need to deal with this boundary constraint
    294  1.41   thorpej 		 * XXX in the PCI bus 0 (and ISA) DMA tags, but some
    295  1.41   thorpej 		 * XXX drivers are going to need to be changed first.
    296  1.41   thorpej 		 */
    297  1.41   thorpej 		u_int32_t ctrl;
    298  1.41   thorpej 
    299  1.41   thorpej 		/* XXX no bets... */
    300  1.41   thorpej 		printf("%s: WARNING: Pyxis pass 1 DMA bug; no bets...\n",
    301  1.41   thorpej 		    self->dv_xname);
    302  1.41   thorpej 
    303  1.41   thorpej 		alpha_mb();
    304  1.41   thorpej 		ctrl = REGVAL(CIA_CSR_CTRL);
    305  1.41   thorpej 		ctrl &= ~(CTRL_RD_TYPE|CTRL_RL_TYPE|CTRL_RM_TYPE);
    306  1.41   thorpej 		REGVAL(CIA_CSR_CTRL) = ctrl;
    307  1.41   thorpej 		alpha_mb();
    308  1.41   thorpej 	}
    309  1.42   thorpej #endif /* DEC_550 */
    310  1.43   thorpej 
    311  1.43   thorpej 	cia_dma_init(ccp);
    312   1.1       cgd 
    313   1.1       cgd 	switch (hwrpb->rpb_type) {
    314  1.17       cgd #ifdef DEC_KN20AA
    315   1.1       cgd 	case ST_DEC_KN20AA:
    316   1.5       cgd 		pci_kn20aa_pickintr(ccp);
    317   1.1       cgd 		break;
    318   1.1       cgd #endif
    319  1.13       cgd 
    320  1.17       cgd #ifdef DEC_EB164
    321  1.13       cgd 	case ST_EB164:
    322  1.13       cgd 		pci_eb164_pickintr(ccp);
    323  1.39   thorpej 		break;
    324  1.39   thorpej #endif
    325  1.39   thorpej 
    326  1.39   thorpej #ifdef DEC_550
    327  1.39   thorpej 	case ST_DEC_550:
    328  1.39   thorpej 		pci_550_pickintr(ccp);
    329  1.44      ross 		break;
    330  1.44      ross #endif
    331  1.44      ross 
    332  1.44      ross #ifdef DEC_1000A
    333  1.44      ross 	case ST_DEC_1000A:
    334  1.44      ross 		pci_1000a_pickintr(ccp, &ccp->cc_iot, &ccp->cc_memt,
    335  1.44      ross 			&ccp->cc_pc);
    336  1.45      ross 		break;
    337  1.13       cgd #endif
    338  1.45      ross 
    339  1.45      ross #ifdef DEC_1000
    340  1.45      ross 	case ST_DEC_1000:
    341  1.45      ross 		pci_1000_pickintr(ccp, &ccp->cc_iot, &ccp->cc_memt,
    342  1.45      ross 			&ccp->cc_pc);
    343  1.13       cgd 		break;
    344  1.13       cgd #endif
    345  1.13       cgd 
    346   1.1       cgd 	default:
    347   1.1       cgd 		panic("ciaattach: shouldn't be here, really...");
    348   1.1       cgd 	}
    349   1.1       cgd 
    350   1.5       cgd 	pba.pba_busname = "pci";
    351  1.23   thorpej 	pba.pba_iot = &ccp->cc_iot;
    352  1.23   thorpej 	pba.pba_memt = &ccp->cc_memt;
    353  1.30   thorpej 	pba.pba_dmat =
    354  1.30   thorpej 	    alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI);
    355   1.5       cgd 	pba.pba_pc = &ccp->cc_pc;
    356   1.5       cgd 	pba.pba_bus = 0;
    357  1.20       cgd 	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
    358   1.5       cgd 	config_found(self, &pba, ciaprint);
    359   1.1       cgd }
    360   1.1       cgd 
    361   1.1       cgd static int
    362   1.1       cgd ciaprint(aux, pnp)
    363   1.1       cgd 	void *aux;
    364   1.9       cgd 	const char *pnp;
    365   1.1       cgd {
    366   1.5       cgd 	register struct pcibus_attach_args *pba = aux;
    367   1.1       cgd 
    368   1.1       cgd 	/* only PCIs can attach to CIAs; easy. */
    369   1.1       cgd 	if (pnp)
    370  1.11  christos 		printf("%s at %s", pba->pba_busname, pnp);
    371  1.11  christos 	printf(" bus %d", pba->pba_bus);
    372   1.1       cgd 	return (UNCONF);
    373   1.1       cgd }
    374